Datasheet LT6301 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Dual 500mA, Differential xDSL Line Driver in 28-Lead TSSOP Package |
| 页数 / 页 | 16 / 7 — APPLICATIO S I FOR ATIO. Setting the Quiescent Operating Current. Figure … |
| 文件格式/大小 | PDF / 252 Kb |
| 文件语言 | 英语 |
APPLICATIO S I FOR ATIO. Setting the Quiescent Operating Current. Figure 1. Internal Current Biasing Circuitry
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LT6301
U U W U APPLICATIO S I FOR ATIO
The LT6301 is a high speed, 200MHz gain bandwidth
Setting the Quiescent Operating Current
product, quad voltage feedback amplifier with high output Power consumption and dissipation are critical concerns current drive capability, 500mA source and sink. The in multiport xDSL applications. Two pins, Shutdown LT6301 is ideal for use as a line driver in xDSL data (SHDN) and Shutdown Reference (SHDNREF), are provided communication applications. The output voltage swing to control quiescent power consumption and allow for the has been optimized to provide sufficient headroom when complete shutdown of the drivers. The quiescent current operating from ±12V power supplies in full-rate ADSL should be set high enough to prevent distortion induced applications. The LT6301 also allows for an adjustment of errors in a particular application, but not so high that power the operating current to minimize power consumption. In is wasted in the driver unnecessarily. A good starting point addition, the LT6301 is available in a small footprint to evaluate the LT6301 is to set the quiescent current to surface mount package to minimize PCB area. 10mA per amplifier. Pins 4 and 5 set the current for ampli- To minimize signal distortion, the LT6301 amplifiers are fiers A and B and Pins 10 and 11 set the current for amplifers decompensated to provide very high open-loop gain at C and D. Each amplifier pair should be controlled separately. high frequency. As a result each amplifier is frequency The internal biasing circuitry is shown in Figure 1. Ground- stable with a closed-loop gain of 10 or more. If a closed- ing the SHDNREF pin and directly driving the SHDN pin with loop gain of less than 10 is desired, external frequency a voltage can control the operating current as seen in the compensating components can be used. Typical Performance Characteristics. When the SHDN pin SHDN is less than SHDNREF + 0.4V, the driver is shut down and consumes typically only 100µA of supply current and the 5I 2k outputs are in a high impedance state. Part to part varia- tions, however, will cause inconsistent control of the qui- I 2I 2I escent current if direct voltage drive of the SHDN pin is used. Using an external resistor, RBIAS, connected in one of two 1k ways provides a much more predictable control of the TO START-UP I quiescent supply current. Figure 2 illustrates the effect on CIRCUITRY BIAS TO AMPLIFIERS supply current per amplifier with R BIAS CIRCUITRY BIAS connected be- SHDNREF 6301 F01 tween the SHDN pin and the 12V V+ supply of the LT6301 2 IBIAS = ISHDN = ISHDNREF and the approximate design equations. Figure 3 illustrates 5 ISUPPLY PER AMPLIFIER (mA) = 64 • IBIAS the same control with RBIAS connected between the SHDNREF pin and ground while the SHDN pin is tied to V+.
Figure 1. Internal Current Biasing Circuitry
Either approach is equally effective. 30 VS = ±12V V+ = 12V 25 RBIAS SHDN 20 V+ – 1.2V IS PER AMPLIFIER (mA) ≈ • 25.6 RBIAS + 2k 15 R V+ – 1.2V PER AMPLIFIER (mA) BIAS = • 25.6 – 2k I 10 S PER AMPLIFIER (mA) SHDNREF I SUPPLY 5 0 7 10 40 70 100 130 160 190 RBIAS (kΩ) 6301 F02
Figure 2. RBIAS to V+ Current Control
sn6301 6301f 7
U U W U APPLICATIO S I FOR ATIO
The LT6301 is a high speed, 200MHz gain bandwidth
Setting the Quiescent Operating Current
product, quad voltage feedback amplifier with high output Power consumption and dissipation are critical concerns current drive capability, 500mA source and sink. The in multiport xDSL applications. Two pins, Shutdown LT6301 is ideal for use as a line driver in xDSL data (SHDN) and Shutdown Reference (SHDNREF), are provided communication applications. The output voltage swing to control quiescent power consumption and allow for the has been optimized to provide sufficient headroom when complete shutdown of the drivers. The quiescent current operating from ±12V power supplies in full-rate ADSL should be set high enough to prevent distortion induced applications. The LT6301 also allows for an adjustment of errors in a particular application, but not so high that power the operating current to minimize power consumption. In is wasted in the driver unnecessarily. A good starting point addition, the LT6301 is available in a small footprint to evaluate the LT6301 is to set the quiescent current to surface mount package to minimize PCB area. 10mA per amplifier. Pins 4 and 5 set the current for ampli- To minimize signal distortion, the LT6301 amplifiers are fiers A and B and Pins 10 and 11 set the current for amplifers decompensated to provide very high open-loop gain at C and D. Each amplifier pair should be controlled separately. high frequency. As a result each amplifier is frequency The internal biasing circuitry is shown in Figure 1. Ground- stable with a closed-loop gain of 10 or more. If a closed- ing the SHDNREF pin and directly driving the SHDN pin with loop gain of less than 10 is desired, external frequency a voltage can control the operating current as seen in the compensating components can be used. Typical Performance Characteristics. When the SHDN pin SHDN is less than SHDNREF + 0.4V, the driver is shut down and consumes typically only 100µA of supply current and the 5I 2k outputs are in a high impedance state. Part to part varia- tions, however, will cause inconsistent control of the qui- I 2I 2I escent current if direct voltage drive of the SHDN pin is used. Using an external resistor, RBIAS, connected in one of two 1k ways provides a much more predictable control of the TO START-UP I quiescent supply current. Figure 2 illustrates the effect on CIRCUITRY BIAS TO AMPLIFIERS supply current per amplifier with R BIAS CIRCUITRY BIAS connected be- SHDNREF 6301 F01 tween the SHDN pin and the 12V V+ supply of the LT6301 2 IBIAS = ISHDN = ISHDNREF and the approximate design equations. Figure 3 illustrates 5 ISUPPLY PER AMPLIFIER (mA) = 64 • IBIAS the same control with RBIAS connected between the SHDNREF pin and ground while the SHDN pin is tied to V+.
Figure 1. Internal Current Biasing Circuitry
Either approach is equally effective. 30 VS = ±12V V+ = 12V 25 RBIAS SHDN 20 V+ – 1.2V IS PER AMPLIFIER (mA) ≈ • 25.6 RBIAS + 2k 15 R V+ – 1.2V PER AMPLIFIER (mA) BIAS = • 25.6 – 2k I 10 S PER AMPLIFIER (mA) SHDNREF I SUPPLY 5 0 7 10 40 70 100 130 160 190 RBIAS (kΩ) 6301 F02
Figure 2. RBIAS to V+ Current Control
sn6301 6301f 7