Datasheet LT1784 (Analog Devices) - 9

LT1784
APPLICATIONS INFORMATION Supply Voltage Output
The positive supply pin of the LT1784 should be bypassed The output of the LT1784 can swing to within 80mV of the with a small capacitor (typically 0.1μF) within an inch of positive rail and within 4mV of the negative rail with no the pin. When driving heavy loads, and additional 4.7μF load. When monitoring input voltages within 80mV of the electrolytic capacitor should be used. When using split positive rail or within 4mV of the negative rail, gain should supplies the same is true for the negative supply pin. be taken to keep the output from clipping. The LT1784 can typically sink and source over 25mA at ±5V supplies, The LT1784 is protected against reverse battery voltages sourcing current is reduced to 7.5mA at 3V total supplies up to 18V. In the event a reverse battery condition occurs as noted in the Electrical Characteristics section. the supply current is less than 1nA. The LT1784 is internally compensated to drive at least
Inputs
400pF of capacitance under any output loading condi- The LT1784 has two input stages, NPN and PNP (see the tions. A 0.22μF capacitor in series with a 150Ω resistor Simplifi ed Schematic), resulting in three distinct operating between the output and ground will compensate these regions as shown in the “Input Bias Current vs Common amplifi ers for larger capacitive loads, up to 10,000pF at Mode” Typical Performance Characteristic curve. all output currents. For input voltages about 1V or more below V+, the PNP
Distortion
input stage is active and the input bias current is typically There are two main contributors to distortion in op amps: –250nA. When the input common mode voltage is within output crossover distortion as the output transitions from 0.6V of the positive rail, the NPN stage is operating and sourcing to sinking current, and distortion caused by non- the input bias current is typically 500nA. Increases in linear common mode rejection. If the op amp is operating temperature will cause the voltage at which operation inverting, there is no common mode induced distortion. switches from the PNP input stage to the NPN input stage If the op amp is operating in the PNP input stage (input to move towards V+. The input offset voltage of the NPN not within 1V of V+), the CMRR is very good, typically stage is untrimmed and is typically 3mV. 95dB. When the LT1784 switches between input stages, A Schottky diode in the collector of the input transistors, there is signifi cant nonlinearity in the CMRR. Lower load along with special geometries for these NPN transistors, resistance increases the output crossover distortion but allow the LT1784 to operate with either or both of its inputs has no effect on the input stage transition distortion. For above V+. At about 0.3V above V+, the NPN input transis- lowest distortion, the LT1784 should be operated single tors is fully saturated and the input bias current is typically supply, with the output always sourcing current and with 200μA at room temperature. The input offset voltage is the input voltage swing between ground and (V+ – 1V). See typically 3mV when operating above V+. The LT1784 will Typical Performance Characteristics curve, “Total Harmonic operate with inputs 18V above V– regardless of V+. Distortion + Noise vs Output Voltage Amplitude.” The inputs are protected against excursions as much as
Gain
10V below V– by an internal 1k resistor in series with each input and a diode from the input to the negative supply. The open-loop gain is almost independent of load when The input stage of the LT1784 incorporates phase reversal the output is sourcing current. This optimizes performance protection to prevent the output from phase reversing for in single supply applications where the load is returned inputs up to 9V below V–. There are no clamping diodes to ground. The Typical Performance Characteric curve between the inputs and the maximum differential input “Open-Loop Gain” for various loads shows the details. voltage is 18V. 1784fa 9