Datasheet ADP2114 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Configurable, Dual 2 A/Single 4 A, Synchronous Step-Down DC-to-DC Regulator |
| 页数 / 页 | 37 / 10 — ADP2114. Data Sheet. 250. 330. fSW = 300kHz. 225. fSW = 600kHz f. 320. SW … |
| 修订版 | C |
| 文件格式/大小 | PDF / 2.8 Mb |
| 文件语言 | 英语 |
ADP2114. Data Sheet. 250. 330. fSW = 300kHz. 225. fSW = 600kHz f. 320. SW = 1.2MHz. 200. s) (n. 310. 175. 150. 300. M O U. f SW. 125. IM N. 290. 100. 280. 270. 2.5
该数据表的模型线
文件文字版本
ADP2114 Data Sheet 250 330 fSW = 300kHz 225 fSW = 600kHz f 320 SW = 1.2MHz 200 s) (n 310 E 175 IM z) -T H N 150 (k 300 M O U f SW 125 IM N 290 MI 100 280 75 50 270 2.5 3.0 3.5 4.0 4.5 5.0 5.5
014
2.5 3.0 3.5 4.0 4.5 5.0 5.5
017
VIN (V) V
8143-
IN (V)
8143- 0 0 Figure 14. Minimum On-Time, Open Loop, Includes Dead Time Figure 17. Switching Frequency vs. Input Voltage, fSW = 300 kHz
350 660 fSW = 300kHz 330 fSW = 600kHz 640 310 fSW = 1.2MHz s) 290 (n 620 IME 270 -T z) F H F 250 (k 600 M O f SW 230 IMU N 580 210 MI 190 560 170 150 540 2.5 3.0 3.5 4.0 4.5 5.0 5.5
015
2.5 3.0 3.5 4.0 4.5 5.0 5.5
018
VIN (V) V
8143-
IN (V)
8143- 0 0 Figure 15. Minimum Off-Time, Open Loop, Includes Dead Time Figure 18. Switching Frequency vs. Input Voltage, fSW = 600 kHz
120 80 70 100 60 ) ) Ω 80 Ω 50 (m (m N N O O 60 DS 40 DS R S R S O O 30 40 PM NM +125°C 20 +125°C +115°C +115°C 20 +85°C 10 +85°C +25°C +25°C –40°C –40°C 0 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
016
2.5 3.0 3.5 4.0 4.5 5.0 5.5
019
VIN (V) V
8143-
IN (V)
8143- 0 0 Figure 16. High-Side PMOS Resistance vs. Input Voltage, Includes Bond Wires Figure 19. Low-Side NMOS Resistance vs. Input Voltage, Includes Bond Wires Rev. C | Page 10 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY CURRENT LOAD TRANSIENT RESPONSE BODE PLOTS SIMPLIFIED BLOCK DIAGRAM THEORY OF OPERATION ADIsimPower DESIGN TOOL CONTROL ARCHITECTURE UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CONTROL SOFT START POWER GOOD PULSE SKIP MODE HICCUP MODE CURRENT LIMIT THERMAL OVERLOAD PROTECTION MAXIMUM DUTY CYCLE OPERATION SYNCHRONIZATION CONVERTER CONFIGURATION SELECTING THE OUTPUT VOLTAGE SETTING THE OSCILLATOR FREQUENCY SYNCHRONIZATION AND CLKOUT OPERATION MODE CONFIGURATION EXTERNAL COMPONENTS SELECTION INPUT CAPACITOR SELECTION VDD RC FILTER INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION CONTROL LOOP COMPENSATION DESIGN EXAMPLE CHANNEL 1 CONFIGURATION AND COMPONENTS SELECTION CHANNEL 2 CONFIGURATION AND COMPONENTS SELECTION SYSTEM CONFIGURATION APPLICATION CIRCUITS POWER DISSIPATION, THERMAL CONSIDERATIONS CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE
014
2.5 3.0 3.5 4.0 4.5 5.0 5.5
017
VIN (V) V
8143-
IN (V)
8143- 0 0 Figure 14. Minimum On-Time, Open Loop, Includes Dead Time Figure 17. Switching Frequency vs. Input Voltage, fSW = 300 kHz
350 660 fSW = 300kHz 330 fSW = 600kHz 640 310 fSW = 1.2MHz s) 290 (n 620 IME 270 -T z) F H F 250 (k 600 M O f SW 230 IMU N 580 210 MI 190 560 170 150 540 2.5 3.0 3.5 4.0 4.5 5.0 5.5
015
2.5 3.0 3.5 4.0 4.5 5.0 5.5
018
VIN (V) V
8143-
IN (V)
8143- 0 0 Figure 15. Minimum Off-Time, Open Loop, Includes Dead Time Figure 18. Switching Frequency vs. Input Voltage, fSW = 600 kHz
120 80 70 100 60 ) ) Ω 80 Ω 50 (m (m N N O O 60 DS 40 DS R S R S O O 30 40 PM NM +125°C 20 +125°C +115°C +115°C 20 +85°C 10 +85°C +25°C +25°C –40°C –40°C 0 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
016
2.5 3.0 3.5 4.0 4.5 5.0 5.5
019
VIN (V) V
8143-
IN (V)
8143- 0 0 Figure 16. High-Side PMOS Resistance vs. Input Voltage, Includes Bond Wires Figure 19. Low-Side NMOS Resistance vs. Input Voltage, Includes Bond Wires Rev. C | Page 10 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY CURRENT LOAD TRANSIENT RESPONSE BODE PLOTS SIMPLIFIED BLOCK DIAGRAM THEORY OF OPERATION ADIsimPower DESIGN TOOL CONTROL ARCHITECTURE UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CONTROL SOFT START POWER GOOD PULSE SKIP MODE HICCUP MODE CURRENT LIMIT THERMAL OVERLOAD PROTECTION MAXIMUM DUTY CYCLE OPERATION SYNCHRONIZATION CONVERTER CONFIGURATION SELECTING THE OUTPUT VOLTAGE SETTING THE OSCILLATOR FREQUENCY SYNCHRONIZATION AND CLKOUT OPERATION MODE CONFIGURATION EXTERNAL COMPONENTS SELECTION INPUT CAPACITOR SELECTION VDD RC FILTER INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION CONTROL LOOP COMPENSATION DESIGN EXAMPLE CHANNEL 1 CONFIGURATION AND COMPONENTS SELECTION CHANNEL 2 CONFIGURATION AND COMPONENTS SELECTION SYSTEM CONFIGURATION APPLICATION CIRCUITS POWER DISSIPATION, THERMAL CONSIDERATIONS CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE