Datasheet ADP5003 (Analog Devices) - 6

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ADP5003 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Rating
Thermal performance is directly linked to PCB design and PVIN1/PVINSYS to AGND1/AGND2 −0.3 V to +16 V operating environment. Careful attention to PCB thermal PVIN2 to AGND1/AGND2 −0.3 V to +6.0 V design is required. AGND1 to AGND2 −0.3 V to +0.3 V
Table 6. Thermal Resistance
PGND1 to AGND1/AGND2 −0.3 V to +0.3 V
Package Type θ 1 1 JA θJC Unit
PVOUT2 to AGND1/AGND2 −0.3 V to (PVIN2 + 0.3 V) CP-32-7 46.91 20.95 °C/W VFB2N to AGND1/AGND2 −0.3 V to +0.3 V VOUT1, VFB2P, EN1, EN2, SYNC, RT, −0.3 V to (VREG + 0.3 V) 1 θJA and θJC are based on a 4-layer PCB (two signal and two power planes) REFOUT, VBUF, VSET1, VSET2, with nine thermal vias connecting the exposed pad to the ground plane as recommended in the Layout Considerations section. COMP1 to AGND1/AGND2 SW1 to PGND1 −0.3 V to (PVIN1 + 0.3 V) VREG, VREG_LDO to AGND1/AGND2 −0.3 V to the lower of
ESD CAUTION
(PVINSYS + 0.3 V) or +6.0 V VREG to VREG_LDO −0.3 V to +0.3 V Storage Temperature Range −65°C to +150°C Operating Junction Temperature −40°C to +125°C Range Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 6 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS LDO SPECIFICATIONS ADAPTIVE HEADROOM CONTROLLER SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Adaptive Headroom Control Precision Enable/Shutdown Undervoltage Lockout (UVLO) Thermal Shutdown (TSD) Active Pull Down Soft Start (SS) Power-Good BUCK REGULATOR Control Scheme Oscillator Frequency Control External Oscillator Synchronization Buck Startup Current-Limit and Short-Circuit Protection LDO REGULATOR LDO Startup Current Limit Differential Remote Sensing POWER-GOOD OUTPUT VOLTAGE OF THE BUCK REGULATOR OUTPUT VOLTAGE OF THE LDO REGULATOR VOLTAGE CONVERSION LIMITATIONS COMPONENT SELECTION Output Capacitors Input Capacitor Inductor COMPENSATION COMPONENTS DESIGN JUNCTION TEMPERATURE BUCK REGULATOR DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY FOR THE BUCK REGULATOR SETTING THE OUTPUT VOLTAGE FOR THE BUCK REGULATOR SELECTING THE INDUCTOR FOR THE BUCK REGULATOR SELECTING THE OUTPUT CAPACITOR FOR THE BUCK REGULATOR DESIGNING THE COMPENSATION NETWORK FOR THE BUCK REGULATOR SELECTING THE INPUT CAPACITOR FOR THE BUCK REGULATOR ADAPTIVE HEADROOM CONTROL DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SETTING THE OUTPUT VOLTAGE FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE INDUCTOR FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE OUTPUT CAPACITORS FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE INPUT CAPACITOR FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL RECOMMENDED BUCK EXTERNAL COMPONENTS FOR THE BUCK REGULATOR BUCK CONFIGURATIONS INDEPENDENT ADAPTIVE HEADROOM LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE