Datasheet ADP5014 (Analog Devices) - 10

ADP5014 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 100 100 90 90 80 80 70 70 ) % 60 ( 60 Y (%) Y C C N 50 N 50 IE IE C 40 FFI 40 FFIC E E 30 30 V V OUT = 1.2V OUT = 1.2V FPWM V 20 V OUT = 1.8V FPWM OUT = 1.5V 20 VOUT = 3.3V FPWM VOUT = 1.8V VOUT = 1.2V PSM 10 V 10 OUT = 2.5V VOUT = 1.8V PSM V V OUT = 3.3V OUT = 3.3V PSM 0 0 0 1.0 2.0 3.0 4.0
04
0.01 0.1 1 10
07 0 -0 6-
I I
496
OUT (A)
49
OUT (A)
15 15 Figure 4. Channel 1/Channel 2 Efficiency Curve, VIN = 5 V, fSW = 1.2 MHz, Figure 7. Channel 1/Channel 2 Efficiency Curve, VIN = 5 V, fSW = 1.2 MHz, FPWM Mode FPWM and Automatic PWM/PSM Modes
100 100 90 90 80 80 70 70 ) % 60 Y ( 60 C Y (%) C 50 IEN 50 IEN IC F IC 40 F 40 EF EF 30 30 20 V V 20 OUT = 1.2V OUT = 1.2V V V OUT = 1.5V 10 OUT = 1.5V V V 10 OUT = 1.8V OUT = 1.8V V V OUT = 2.5V OUT = 2.5V V 0 OUT = 3.3V 0 0 1.0 2.0 3.0 4.0
05 0
0 0.5 1.0 1.5 2.0
08 6- 0 6-
IOUT (A)
549 49 1
IOUT (A)
15 Figure 5. Channel 1/Channel 2 Efficiency Curve, VIN = 3.3 V, fSW = 1.2 MHz, Figure 8. Channel 3/Channel 4 Efficiency Curve, VIN = 5 V, fSW = 1.2 MHz, FPWM Mode FPWM Mode
100 100 90 90 80 80 70 70 60 Y (%) 60 C Y (%) N C 50 IE N 50 C IE C 40 FFI 40 E FFI E 30 30 20 20 f V SW = 500kHz OUT = 1.2V 10 f V SW = 1.2MHz 10 OUT = 1.5V f VOUT = 1.8V SW = 2.4MHz V 0 OUT = 2.5V 0 1.0 2.0 3.0 4.0 0
06 0
0 0.5 1.0 1.5 2.0
09 6- 0
I
6-
OUT (A)
49 49 15
IOUT (A)
15 Figure 6. Channel 1/Channel 2 Efficiency Curve, VIN = 5 V, VOUT = 3.3 V, FPWM Figure 9. Channel 3/Channel 4 Efficiency Curve, VIN = 3.3 V, fSW = 1.2 MHz, Mode FPWM Mode Rev. 0 | Page 10 of 34 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode FPWM and Automatic PWM/PSM Modes LOW NOISE ARCHITECTURE INTERNAL REFERENCE (VREF) ADJUSTABLE OUTPUT VOLTAGE FUNCTION CONFIGURATIONS (CFG1 AND CFG2) PARALLEL OPERATION MANUAL/SEQUENCE MODE Manual Mode (Precision Enable) Sequence Mode GENERAL PURPOSE INPUT/OUTPUT (GPIO) OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT POWER-GOOD FUNCTION UV COMPARATOR (SEQUENCE MODE ONLY) SOFT START STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLD BACK SHORT-CIRCUIT PROTECTION (SCP) OVERVOLTAGE PROTECTION UNDERVOLTAGE LOCKOUT ACTIVE OUTPUT DISCHARGE SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CONFIGUATIONS (CFG1 AND CFG2) SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR DESIGNING THE COMPENSATION NETWORK PCB LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE