Datasheet ADP2390 (Analog Devices) - 3

Data Sheet ADP2389/ADP2390 DETAILED FUNCTIONAL BLOCK DIAGRAM VREG CLK 5V VIN REGULATOR RT OSC SLOPE RAMP UVLO EN EN_BUF SHUTDOWN THERMAL 1.2V LOGIC SHUTDOWN 1.3µA 4.8µA PVIN OCP I BOOST MAX ILIM THRESHOLD + REGULATOR HICCUP SETTING OCP MODE – + ACS– SLOPE RAMP Σ COMP 0.6V + + ISS CMP SS + gm – BST FB – SKIP NFET PFM – CMP DRIVER THRESHOLD + SW CONTROL FTW ADP2390 LOGIC FAST VREG ONLY AND MOSFET TRANSIENT DRIVER WITH WINDOW NFET ANTICROSS DRIVER PROTECTION 0.7V OVP – PGND + + CLK – INEG 0.66V NEGATIVE – CURRENT COMPARATOR + – 0.54V + PGOOD DEGLITCH ADP2389/ADP2390 GND
3 00 2- 219 1 Figure 3. ADP2389/ADP2390 Detailed Functional Block Diagram Rev. 0 | Page 3 of 23 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL INFORMATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PFM MODE (ADP2390 ONLY) PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SOFT START FAST TRANSIENT RESPONSE POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO COMPENSATION DESIGN DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION SCHEMATIC FOR DESIGN EXAMPLE EXTERNAL COMPONENTS RECOMMENDATION CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE