Datasheet ADP5052 (Analog Devices) - 5
制造商 | Analog Devices |
描述 | 5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator |
页数 / 页 | 36 / 5 — Data Sheet. ADP5052. BUCK REGULATOR SPECIFICATIONS. Table 3. Parameter. … |
修订版 | D |
文件格式/大小 | PDF / 1.1 Mb |
文件语言 | 英语 |
Data Sheet. ADP5052. BUCK REGULATOR SPECIFICATIONS. Table 3. Parameter. Symbol. Min. Typ. Max. Unit. Test Conditions/Comments
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Data Sheet ADP5052 BUCK REGULATOR SPECIFICATIONS
VIN = 12 V, VVREG = 5.1 V, fSW = 600 kHz for all channels, TJ = −40°C to +125°C for minimum and maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
CHANNEL 1 SYNC BUCK REGULATOR FB1 Pin Fixed Output Options VOUT1 0.85 1.60 V Fuse trim Adjustable Feedback Voltage VFB1 0.800 V Feedback Voltage Accuracy VFB1(DEFAULT) −0.55 +0.55 % TJ = 25°C −1.25 +1.0 % 0°C ≤ TJ ≤ 85°C −1.5 +1.5 % −40°C ≤ TJ ≤ +125°C Feedback Bias Current IFB1 0.1 µA Adjustable voltage SW1 Pin High-Side Power FET RDSON(1H) 100 mΩ Pin-to-pin measurement On Resistance Current-Limit Threshold ITH(ILIM1) 3.50 4.4 5.28 A RILIM1 = floating 1.91 2.63 3.08 A RILIM1 = 47 kΩ 4.95 6.44 7.48 A RILIM1 = 22 kΩ Minimum On Time tMIN_ON1 117 155 ns fSW = 250 kHz to 1.4 MHz Minimum Off Time tMIN_OFF1 1/9 × tSW ns fSW = 250 kHz to 1.4 MHz Low-Side Driver, DL1 Pin Rising Time tRISING1 20 ns CISS = 1.2 nF Falling Time tFALLING1 3.4 ns CISS = 1.2 nF Sourcing Resistor tSOURCING1 10 Ω Sinking Resistor tSINKING1 0.95 Ω Error Amplifier (EA), COMP1 Pin EA Transconductance gm1 310 470 620 µS Soft Start Soft Start Time tSS1 2.0 ms SS12 connected to VREG Programmable Soft Start Range 2.0 8.0 ms Hiccup Time tHICCUP1 7 × tSS1 ms COUT Discharge Switch On Resistance RDIS1 250 Ω CHANNEL 2 SYNC BUCK REGULATOR FB2 Pin Fixed Output Options VOUT2 3.3 5.0 V Fuse trim Adjustable Feedback Voltage VFB2 0.800 V Feedback Voltage Accuracy VFB2(DEFAULT) −0.55 +0.55 % TJ = 25°C −1.25 +1.0 % 0°C ≤ TJ ≤ 85°C −1.5 +1.5 % −40°C ≤ TJ ≤ +125°C Feedback Bias Current IFB2 0.1 µA Adjustable voltage SW2 Pin High-Side Power FET RDSON(2H) 110 mΩ Pin-to-pin measurement On Resistance Current-Limit Threshold ITH(ILIM2) 3.50 4.4 5.28 A RILIM2 = floating 1.91 2.63 3.08 A RILIM2 = 47 kΩ 4.95 6.44 7.48 A RILIM2 = 22 kΩ Minimum On Time tMIN_ON2 117 155 ns fSW = 250 kHz to 1.4 MHz Minimum Off Time tMIN_OFF2 1/9 × tSW ns fSW = 250 kHz to 1.4 MHz Low-Side Driver, DL2 Pin Rising Time tRISING2 20 ns CISS = 1.2 nF Falling Time tFALLING2 3.4 ns CISS = 1.2 nF Sourcing Resistor tSOURCING2 10 Ω Sinking Resistor tSINKING2 0.95 Ω Rev. D | Page 5 of 36 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS LDO REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode Forced PWM and Automatic PWM/PSM Modes ADJUSTABLE AND FIXED OUTPUT VOLTAGES INTERNAL REGULATORS (VREG AND VDD) SEPARATE SUPPLY APPLICATIONS LOW-SIDE DEVICE SELECTION BOOTSTRAP CIRCUITRY ACTIVE OUTPUT DISCHARGE SWITCH PRECISION ENABLING OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT SOFT START PARALLEL OPERATION STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLDBACK Pulse Skip Mode Under Maximum Duty Cycle HICCUP PROTECTION LATCH-OFF PROTECTION Short-Circuit Latch-Off Mode Overvoltage Latch-Off Mode UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FUNCTION THERMAL SHUTDOWN LDO REGULATOR APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL PROGRAMMING THE ADJUSTABLE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION LOW-SIDE POWER DEVICE SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown LDO Regulator Power Dissipation JUNCTION TEMPERATURE DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CURRENT LIMIT SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR SELECTING THE LOW-SIDE MOSFET DESIGNING THE COMPENSATION NETWORK SELECTING THE SOFT START TIME SELECTING THE INPUT CAPACITOR RECOMMENDED EXTERNAL COMPONENTS CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE