Datasheet ADP2442 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 36 V,1 A, Synchronous, Step-Down, DC-to-DC Regulator with External Clock Synchronization |
| 页数 / 页 | 36 / 6 — ADP2442. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. CCV. FB … |
| 修订版 | B |
| 文件格式/大小 | PDF / 1.6 Mb |
| 文件语言 | 英语 |
ADP2442. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. CCV. FB 1. 9 VIN. COMP 2. TOP. 8 SW. VIEW. EN 3. 7 PGND. GOOD. NC/YS. NOTES
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ADP2442 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ND T AG CCV BS 12 11 10 FB 1 9 VIN ADP2442 COMP 2 TOP 8 SW VIEW EN 3 7 PGND 4 5 6 Q DE RE O GOOD F M P NC/YS NOTES
003
1. THE EXPOSED PAD SHOULD BE CONNECTED TO THE SYSTEM AGND PLANE AND PGND PLANE.
10667- Figure 3. Pin Configuration, Top View
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 FB Feedback. The FB regulation voltage is 0.6 V. Connect this pin to a resistor divider from the output of the dc-to-dc regulator. 2 COMP Error Amplifier Compensation. Connect a resistor and a capacitor in series to ground. 3 EN Precision Enable. This features offers ±5% accuracy when using a 1.25 V reference voltage. Pull this pin high to enable the regulator and pull it low to disable the regulator. Do not leave this pin floating. 4 PGOOD Active High Power Good Output. This pin pulls low when the output is out of regulation. 5 FREQ Switching Frequency. A resistor to AGND sets the switching frequency (see the Setting the Switching Frequency section). Do not leave this pin floating. 6 SYNC/MODE External Clock Synchronization/Mode Pin. This pin can be used for external frequency synchronization and for setting forced fixed frequency mode or pulse skip mode. SYNC/MODE accepts an external clock signal, and when pulled high to 5 V, it sets the mode as forced fixed frequency mode. When this pin is tied to AGND, pulse skip mode enables. Do not leave the SYNC/MODE pin floating. 7 PGND Power Ground. Connect a decoupling ceramic capacitor as close as possible between the VIN pin and PGND. Connect this pin directly to the exposed pad. 8 SW Switch. The midpoint for the drain of the low-side N-channel power MOSFET switch and the source for the high- side N-channel power MOSFET switch. 9 VIN Power Supply Input. Connect this pin to the input power source, and connect a bypass ceramic capacitor directly from this pin to PGND, as close as possible to the IC. The operation voltage is 4.5 V to 36 V. 10 BST Boost. Connect a 10 nF ceramic capacitor between the BST and SW pins as close to the IC as possible to form a floating supply for the high-side N-channel power MOSFET driver. This capacitor is required to drive the gate of the N-channel power MOSFET above the supply voltage. 11 VCC Output of the Internal Low Dropout Regulator. This pin supplies power for the internal controller and driver circuitry. Connect a 1 µF ceramic capacitor between VCC and AGND and a 1 µF ceramic capacitor between VCC and PGND. The VCC output is active when the EN pin voltage is more than 0.7 V. 12 AGND Analog Ground. This pin is the internal ground for the control functions. Connect this pin to the exposed pad. EP Exposed Pad. Connect the exposed pad to the system AGND plane and PGND plane. Rev. B | Page 6 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL CIRCUIT CONFIGURATION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EFFICIENCY IN FORCED FIXED FREQUENCY MODE EFFICIENCY IN PULSE SKIP MODE INTERNAL BLOCK DIAGRAM THEORY OF OPERATION CONTROL ARCHITECURE Fixed Frequency Mode Pulse Skip Mode ADJUSTABLE FREQUENCY POWER GOOD MODE OF OPERATION EXTERNAL SYNCHRONIZATION SOFT START UNDERVOLTAGE LOCKOUT PRECISION ENABLE/SHUTDOWN CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL SELECTING THE OUTPUT VOLTAGE SETTING THE SWITCHING FREQUENCY EXTERNAL COMPONENT SELECTION Input Capacitor Selection Inductor Selection Output Capacitor Selection BOOST CAPACITOR VCC CAPACITOR LOOP COMPENSATION LARGE SIGNAL ANALYSIS OF THE LOOP COMPENSATION DESIGN EXAMPLE CONFIGURATION AND COMPONENTS SELECTION Resistor Divider Switching Frequency Inductor Selection Input Capacitor Selection Output Capacitor Selection Compensation Selection SYSTEM CONFIGURATION TYPICAL APPLICATION CIRCUITS DESIGN EXAMPLE OTHER TYPICAL CIRCUIT CONFIGURATIONS POWER DISSIPATION AND THERMAL CONSIDERATIONS POWER DISSIPATION Inductor Losses Power Switch Conduction Losses Switching Losses Transition Losses THERMAL CONSIDERATIONS EVALUATION BOARD THERMAL PERFORMANCE CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE
003
1. THE EXPOSED PAD SHOULD BE CONNECTED TO THE SYSTEM AGND PLANE AND PGND PLANE.
10667- Figure 3. Pin Configuration, Top View
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 FB Feedback. The FB regulation voltage is 0.6 V. Connect this pin to a resistor divider from the output of the dc-to-dc regulator. 2 COMP Error Amplifier Compensation. Connect a resistor and a capacitor in series to ground. 3 EN Precision Enable. This features offers ±5% accuracy when using a 1.25 V reference voltage. Pull this pin high to enable the regulator and pull it low to disable the regulator. Do not leave this pin floating. 4 PGOOD Active High Power Good Output. This pin pulls low when the output is out of regulation. 5 FREQ Switching Frequency. A resistor to AGND sets the switching frequency (see the Setting the Switching Frequency section). Do not leave this pin floating. 6 SYNC/MODE External Clock Synchronization/Mode Pin. This pin can be used for external frequency synchronization and for setting forced fixed frequency mode or pulse skip mode. SYNC/MODE accepts an external clock signal, and when pulled high to 5 V, it sets the mode as forced fixed frequency mode. When this pin is tied to AGND, pulse skip mode enables. Do not leave the SYNC/MODE pin floating. 7 PGND Power Ground. Connect a decoupling ceramic capacitor as close as possible between the VIN pin and PGND. Connect this pin directly to the exposed pad. 8 SW Switch. The midpoint for the drain of the low-side N-channel power MOSFET switch and the source for the high- side N-channel power MOSFET switch. 9 VIN Power Supply Input. Connect this pin to the input power source, and connect a bypass ceramic capacitor directly from this pin to PGND, as close as possible to the IC. The operation voltage is 4.5 V to 36 V. 10 BST Boost. Connect a 10 nF ceramic capacitor between the BST and SW pins as close to the IC as possible to form a floating supply for the high-side N-channel power MOSFET driver. This capacitor is required to drive the gate of the N-channel power MOSFET above the supply voltage. 11 VCC Output of the Internal Low Dropout Regulator. This pin supplies power for the internal controller and driver circuitry. Connect a 1 µF ceramic capacitor between VCC and AGND and a 1 µF ceramic capacitor between VCC and PGND. The VCC output is active when the EN pin voltage is more than 0.7 V. 12 AGND Analog Ground. This pin is the internal ground for the control functions. Connect this pin to the exposed pad. EP Exposed Pad. Connect the exposed pad to the system AGND plane and PGND plane. Rev. B | Page 6 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL CIRCUIT CONFIGURATION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EFFICIENCY IN FORCED FIXED FREQUENCY MODE EFFICIENCY IN PULSE SKIP MODE INTERNAL BLOCK DIAGRAM THEORY OF OPERATION CONTROL ARCHITECURE Fixed Frequency Mode Pulse Skip Mode ADJUSTABLE FREQUENCY POWER GOOD MODE OF OPERATION EXTERNAL SYNCHRONIZATION SOFT START UNDERVOLTAGE LOCKOUT PRECISION ENABLE/SHUTDOWN CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL SELECTING THE OUTPUT VOLTAGE SETTING THE SWITCHING FREQUENCY EXTERNAL COMPONENT SELECTION Input Capacitor Selection Inductor Selection Output Capacitor Selection BOOST CAPACITOR VCC CAPACITOR LOOP COMPENSATION LARGE SIGNAL ANALYSIS OF THE LOOP COMPENSATION DESIGN EXAMPLE CONFIGURATION AND COMPONENTS SELECTION Resistor Divider Switching Frequency Inductor Selection Input Capacitor Selection Output Capacitor Selection Compensation Selection SYSTEM CONFIGURATION TYPICAL APPLICATION CIRCUITS DESIGN EXAMPLE OTHER TYPICAL CIRCUIT CONFIGURATIONS POWER DISSIPATION AND THERMAL CONSIDERATIONS POWER DISSIPATION Inductor Losses Power Switch Conduction Losses Switching Losses Transition Losses THERMAL CONSIDERATIONS EVALUATION BOARD THERMAL PERFORMANCE CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE