Datasheet LTC3633A, LTC3633A-1 (Analog Devices) - 8

LTC3633A/LTC3633A-1
PIN FUNCTIONS (QFN/TSSOP) PGOOD1 (Pin 1/Pin 4):
Channel 1 Open-Drain Power ance once the VFB2 pin returns to within ±5% (typical) of Good Output Pin. PGOOD1 is pulled to ground when the the internal reference. voltage on the VFB1 pin is not within ±8% (typical) of the
V
internal 0.6V reference. PGOOD1 becomes high imped-
FB2 (Pin 9/Pin 12):
Channel 2 Output Feedback Voltage Pin. Input to the error amplifier that compares the feedback ance once the VFB1 pin returns to within ±5% (typical) of voltage to the internal 0.6V reference voltage. Connect this the internal reference. pin to a resistor divider network to program the desired
PHMODE (Pin 2/Pin 5):
Phase Select Input. Tie this pin output voltage. to ground to force both channels to switch in phase. Tie
TRACKSS2 (Pin 10/Pin 13):
Output Tracking and Soft-Start this pin to INTVCC to force both channels to switch 180° Input Pin for Channel 2. Forcing a voltage below 0.6V on out of phase. Do not float this pin. this pin bypasses the internal reference input to the error
RUN1 (Pin 3/Pin 6):
Channel 1 Regulator Enable Pin. amplifier. The LTC3633A will servo the FB pin to the TRACK Enables channel 1 operation by tying RUN1 above 1.22V. voltage under this condition. Above 0.6V, the tracking func- Tying it below 1V places channel 1 into shutdown. Do not tion stops and the internal reference resumes control of float this pin. the error amplifier. An internal 1.4µA pull up current from
MODE/SYNC (Pin 4/Pin 7):
Mode Select and External INTVCC allows a soft start function to be implemented by Synchronization Input. Tie this pin to ground to force connecting a capacitor between this pin and SGND. continuous synchronous operation at all output loads.
ITH2 (Pin 11/Pin 14):
Channel 2 Error Amplifier Output Floating this pin or tying it to INTVCC enables high effi- and Switching Regulator Compensation Pin. Connect this ciency Burst Mode operation at light loads. Drive this pin pin to appropriate external components to compensate with a clock to synchronize the LTC3633A switching. An the regulator loop frequency response. Connect this pin internal phase-locked loop will force the bottom power to INTVCC to use the default internal compensation. NMOS’s turn on signal to be synchronized with the rising
V
edge of the CLKIN signal. When this pin is driven with a
ON2 (Pin 12/Pin 15):
On-Time Voltage Input for Chan- nel 2. This pin sets the voltage trip point for the on-time clock, forced continuous mode is automatically selected. comparator. Tying this pin to the output voltage makes the
RT (Pin 5/Pin 8):
Oscillator Frequency Program Pin. on-time proportional to VOUT2 when VOUT2 is within the Connect an external resistor (between 80k to 640k) from VON2 sense range (0.6V – 6V for LTC3633A, 1.5V – 12V for this pin to SGND in order to program the frequency from LTC3633A-1). When VOUT2 is outside the VON2 sense range, 500kHz to 4MHz. When RT is tied to INTVCC, the switching the switching frequency may deviate from the programmed frequency will default to 2MHz. frequency. The pin impedance is nominally 140kΩ.
RUN2 (Pin 6/Pin 9):
Channel 2 Regulator Enable Pin.
SW2 (Pins 13, 14/Pins 16, 17):
Channel 2 Switch Node Enables channel 2 operation by tying RUN2 above 1.22V. Connection to External Inductor. Voltage swing of SW is Tying it below 1V places channel 2 into shutdown. Do not from a diode voltage drop below ground to VIN. float this pin.
VIN2 (Pins 15, 16/Pins 18, 19):
Power Supply Input for
SGND (Pin 7/Pin 10):
Signal Ground Pin. This pin should Channel 2. Input voltage to the on chip power MOSFETs have a low noise connection to reference ground. The on channel 2. This input is capable of operating from a feedback resistor network, external compensation network, different supply voltage than VIN1. and RT resistor should be connected to this ground.
BOOST2 (Pin 17/Pin 20):
Boosted Floating Driver Supply
PGOOD2 (Pin 8/Pin 11):
Channel 2 Open-Drain Power for Channel 2. The (+) terminal of the bootstrap capacitor Good Output Pin. PGOOD2 is pulled to ground when the connects to this pin while the (–) terminal connects to voltage on the VFB2 pin is not within ±8% (typical) of the the SW pin. The normal operation voltage swing of this internal 0.6V reference. PGOOD2 becomes high imped- pin ranges from a diode voltage drop below INTVCC up to VIN+INTVCC. 3633a1fb 8 For more information www.linear.com/LTC3633A Document Outline Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Applications Information Package Description Typical Application Related Parts