ADP2384Data SheetParameterSymbolTest Conditions/CommentsMinTypMaxUnit PGOOD Power-Good Range FB Rising Threshold PGOOD from low to high 95 % FB Rising Hysteresis PGOOD from high to low 5 % FB Falling Threshold PGOOD from low to high 105 % FB Falling Hysteresis PGOOD from high to low 11.7 % Power-Good Deglitch Time PGOOD from low to high 1024 Clock cycle PGOOD from high to low 16 Clock cycle Power-Good Leakage Current VPGOOD = 5 V 0.01 0.1 µA Power-Good Output Low Voltage IPGOOD = 1 mA 125 200 mV EN EN Rising Threshold 1.17 1.28 V EN Falling Threshold 0.97 1.07 V EN Source Current EN voltage below falling threshold 5 µA EN voltage above rising threshold 1 µA THERMAL SHUTDOWN Thermal Shutdown Threshold 150 °C Thermal Shutdown Hysteresis 25 °C 1 Pin-to-pin measurement. 2 Guaranteed by design. Rev. A | Page 4 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL BLOCK DIAGRAM THEORY OF OPERATION CONTROL SCHEME PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SYNCHRONIZATION SOFT START POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING VOLTAGE CONVERSION LIMITATIONS INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING THE INPUT VOLTAGE UVLO COMPENSATION DESIGN ADIsimPower DESIGN TOOL DESIGN EXAMPLE OUTPUT VOLTAGE SETTING (DESIGN EXAMPLE) FREQUENCY SETTING INDUCTOR SELECTION (DESIGN EXAMPLE) OUTPUT CAPACITOR SELECTION (DESIGN EXAMPLE) COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION (DESIGN EXAMPLE) RECOMMENDED EXTERNAL COMPONENTS CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE