Datasheet ADP2127 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Ultralow Profile, 500 mA, 6 MHz, Synchronous, Step-Down, DC-to-DC, EWLP |
| 页数 / 页 | 20 / 6 — ADP2126/ADP2127. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 884 Kb |
| 文件语言 | 英语 |
ADP2126/ADP2127. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. BALL A1. INDICATOR. MODE VIN. SW EXTCLK. GND. TOP VIEW
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文件文字版本
ADP2126/ADP2127 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 1 2 MODE VIN A SW EXTCLK B FB GND C TOP VIEW BALL/PAD SIDE DOWN
05 0
BUMPS/PADS ON OPPOSITE SIDE
8-
(Not to Scale)
65 09 Figure 4. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
A1 MODE Mode Select. This pin toggles between auto mode (PFM and PWM switching) and PWM mode. Set MODE low to allow the part to operate in auto mode. Pull MODE high to force the part to operate in PWM mode. The voltage applied to MODE should never be higher than the voltage applied to VIN. Do not leave this pin floating. A2 VIN Power Supply Input. B1 SW Switch Node. B2 EXTCLK External Clock Enable Signal. The ADP2126/ADP2127 power up when a clock signal (6 MHz to 27 MHz) or a logic high signal (EXTCLK ≥ 1.3 V) is detected on this pin. (The logic high enable feature is only available on certain models.) C1 FB Feedback Divider Input. Connect the output capacitor from FB to GND to set the output voltage ripple and to complete the control loop. C2 GND Ground. Rev. B | Page 6 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION OVERVIEW EXTERNAL CLOCK (EXTCLK) ENABLE SPREAD SPECTRUM OSCILLATOR MODE SELECTION Pulse-Width Modulation (PWM) Mode Auto Mode (PFM and PWM Switching) Pulse Frequency Modulation (PFM) Mode Mode Transition INTERNAL CONTROL FEATURES Synchronous Rectification Soft Start PROTECTION FEATURES Overcurrent Protection Output Short-Circuit Protection (SCP) Thermal Shutdown (TSD) Protection Undervoltage Lockout (UVLO) TIMING CONSTRAINTS Shutdown Time Power-Off Time APPLICATIONS INFORMATION INDUCTOR SELECTION INPUT CAPACITOR SELECTION OUTPUT CAPACITOR SELECTION THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE
05 0
BUMPS/PADS ON OPPOSITE SIDE
8-
(Not to Scale)
65 09 Figure 4. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
A1 MODE Mode Select. This pin toggles between auto mode (PFM and PWM switching) and PWM mode. Set MODE low to allow the part to operate in auto mode. Pull MODE high to force the part to operate in PWM mode. The voltage applied to MODE should never be higher than the voltage applied to VIN. Do not leave this pin floating. A2 VIN Power Supply Input. B1 SW Switch Node. B2 EXTCLK External Clock Enable Signal. The ADP2126/ADP2127 power up when a clock signal (6 MHz to 27 MHz) or a logic high signal (EXTCLK ≥ 1.3 V) is detected on this pin. (The logic high enable feature is only available on certain models.) C1 FB Feedback Divider Input. Connect the output capacitor from FB to GND to set the output voltage ripple and to complete the control loop. C2 GND Ground. Rev. B | Page 6 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION OVERVIEW EXTERNAL CLOCK (EXTCLK) ENABLE SPREAD SPECTRUM OSCILLATOR MODE SELECTION Pulse-Width Modulation (PWM) Mode Auto Mode (PFM and PWM Switching) Pulse Frequency Modulation (PFM) Mode Mode Transition INTERNAL CONTROL FEATURES Synchronous Rectification Soft Start PROTECTION FEATURES Overcurrent Protection Output Short-Circuit Protection (SCP) Thermal Shutdown (TSD) Protection Undervoltage Lockout (UVLO) TIMING CONSTRAINTS Shutdown Time Power-Off Time APPLICATIONS INFORMATION INDUCTOR SELECTION INPUT CAPACITOR SELECTION OUTPUT CAPACITOR SELECTION THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE