Datasheet LT3688 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Dual 800mA Step-Down Switching Regulator with Power-On Reset and Watchdog Timer |
| 页数 / 页 | 28 / 9 — PIN FUNCTIONS (QFN/TSSOP). CPOR1, CPOR2 (Pins 23, 21/Pins 20, 18):. … |
| 文件格式/大小 | PDF / 430 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS (QFN/TSSOP). CPOR1, CPOR2 (Pins 23, 21/Pins 20, 18):. Exposed Pad (Pin 25/Pin 25):. CWDT (Pin 24/Pin 21):
该数据表的模型线
文件文字版本
LT3688
PIN FUNCTIONS (QFN/TSSOP) CPOR1, CPOR2 (Pins 23, 21/Pins 20, 18):
Place a capacitor
Exposed Pad (Pin 25/Pin 25):
Ground. Tie the exposed between this pin and ground to set the power-on-reset pad directly to the ground plane. The exposed pad metal timeout period. of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. The
CWDT (Pin 24/Pin 21):
Place a capacitor between this pin device must be soldered to the circuit board for proper and ground to set the fast and slow watchdog timer periods. operation.
BLOCK DIAGRAM
VIN C1 RT OUT1 ON OFF EN/UVLO V SYNC RT BIAS IN – – + + INTERNAL SWITCH 0.8V REF SWITCH LATCH SLOPE COMP SLOPE COMP LATCH BST1 BST2 R R C3 C5 Q SLAVE MASTER SLAVE Q OUT1 L1 L2 SW1 OSCILLATOR OSCILLATOR OSCILLATOR SW2 OUT2 S S C2 DISABLE C4 DA1 DA2 Burst Mode Burst Mode OPERATION ERROR OPERATION DETECT AMP DETECT R R SEN1 SEN2 + + VC V V C CLAMP C CLAMP – – + + RC CC R1 FB1 FB2 80mV R2 – – RUN/SS1 + + RUN/SS2 – + + – 2.5μA 2.5μA C V POR1 IN C 3.4V POR2 ADJUSTABLE ADJUSTABLE 22μA RESET PULSE RESET PULSE 22μA GENERATOR GENERATOR CONFIGURATION LOGIC RST1 RST2 TRANSITION WATCHDOG DETECT TIMER THREE-STATE DECODE 2μA 22μA WDI WDE CWDT WDO CONFIG GND 3688 BD01 3688f 9
PIN FUNCTIONS (QFN/TSSOP) CPOR1, CPOR2 (Pins 23, 21/Pins 20, 18):
Place a capacitor
Exposed Pad (Pin 25/Pin 25):
Ground. Tie the exposed between this pin and ground to set the power-on-reset pad directly to the ground plane. The exposed pad metal timeout period. of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. The
CWDT (Pin 24/Pin 21):
Place a capacitor between this pin device must be soldered to the circuit board for proper and ground to set the fast and slow watchdog timer periods. operation.
BLOCK DIAGRAM
VIN C1 RT OUT1 ON OFF EN/UVLO V SYNC RT BIAS IN – – + + INTERNAL SWITCH 0.8V REF SWITCH LATCH SLOPE COMP SLOPE COMP LATCH BST1 BST2 R R C3 C5 Q SLAVE MASTER SLAVE Q OUT1 L1 L2 SW1 OSCILLATOR OSCILLATOR OSCILLATOR SW2 OUT2 S S C2 DISABLE C4 DA1 DA2 Burst Mode Burst Mode OPERATION ERROR OPERATION DETECT AMP DETECT R R SEN1 SEN2 + + VC V V C CLAMP C CLAMP – – + + RC CC R1 FB1 FB2 80mV R2 – – RUN/SS1 + + RUN/SS2 – + + – 2.5μA 2.5μA C V POR1 IN C 3.4V POR2 ADJUSTABLE ADJUSTABLE 22μA RESET PULSE RESET PULSE 22μA GENERATOR GENERATOR CONFIGURATION LOGIC RST1 RST2 TRANSITION WATCHDOG DETECT TIMER THREE-STATE DECODE 2μA 22μA WDI WDE CWDT WDO CONFIG GND 3688 BD01 3688f 9