LTC3615/LTC3615-1 pin FuncTions (FE/UF)PHASE (Pin 1/Pin 4): Phase Shift Selection. If pin is tied PGOOD2 (Pin 13/Pin 16): Power Good Output for to SGND, the phase between SW1 and SW2 will be 0° Channel 2. See PGOOD1. (LTC3615) or 140° (LTC3615-1). With the PHASE pin SRLIM (Pin 14 /Pin 17): Slew Rate Limit. Slew rate on the tied to half of the SVIN voltage, 90° (LTC3615) or 140° switch pins is programmed with the SRLIM pin: (LTC3615-1) of phase shift will be selected. Tying PHASE to SVIN will select 180° (LTC3615 and LTC3615-1). 1. Tying this pin to SGND selects maximum slew rate. VFB2 (Pin 2/Pin 5): Voltage Feedback Input Pin for Chan- 2. Minimum slew rate is selected when the pin is open. nel 2. See VFB1. 3. Connecting a resistor from SRLIM to SGND allows the ITH2 (Pin 3/Pin 6): Error Amplifier Compensation of slew rate to be continuously adjusted. Channel 2. See ITH1. 4. If SRLIM is tied to SVIN the slew rate is set to maxi- TRACK/SS2 (Pin 4 /Pin 7): Internal, External Soft-Start, mum and DDR mode is enabled (see the Applications External Reference Input for Channel 2. See TRACK/SS1. Information section). SGND (Pin 5/Pin 8): Signal Ground. All small-signal and PGOOD1 (Pin 15/Pin 18): Power Good Output Pin for compensation components should connect to this ground Channel 1. The open-drain output will be pulled down to pin which, in turn, should be connected to PGND at one ground when the FB1 voltage of the channel is not within point. the power good voltage window. The PGOOD1 will also be pulled down if the channel is not enabled with the RUN1 PVIN2 (Pins 6, 7/Pins 9, 10) Channel 2 Power Supply pin or an undervoltage at SV Input. See PV IN is detected. In DDR mode IN1. (SRLIM = SVIN), the power good window moves in relation SW2 (Pins 8, 9/Pins 11, 12): Channel 2 Switching Node. to the actual TRACK/SS pin voltage. See SW1. SW1 (Pins 17, 16/Pins 19, 20): Channel 1 Switching RUN2 (Pin 10/Pin 13): Enable Pin for Channel 2. See RUN1. Node. Connection to the external inductor. This pin con- RUN1 (Pin 11/Pin 14): Enable Pin for Channel 1. Forcing nects to the drains of the internal synchronous power RUN1 above the input threshold enables the output SW1 of MOSFET switches. channel 1. Forcing both RUNx pins to ground shuts down PVIN1 (Pins 18, 19/Pins 21, 22): Channel 1 Power Supply the LTC3615. In shutdown, all functions are disabled and Inputs. These pins connect to the source of the internal the LTC3615 draws <1µA of supply current. power P-channel MOSFET of channel 1. PVIN1 and PVIN2 R are independent of each other. They may connect to equal T/SYNC (Pin 12/Pin 15): Oscillator Frequency. This pin provides three modes of setting the switching frequency. or lower supplies than SVIN. 1. Connecting a resistor from R SVIN (Pin 20/Pin 23) Signal Input Supply. This pin pow- T/SYNC to ground will set the switching frequency based on the resistor value. ers the internal control circuitry and is monitored by the undervoltage lockout comparator. 2. Driving RT/SYNC with an external clock signal will synchronize the switcher to the applied frequency. The TRACK/SS1 (Pin 21/Pin 24): Internal, External Soft-Start, slope compensation is automatically adapted to the External Reference Input for Channel 1. The type of start-up external clock frequency. 3. Tying this pin to SVIN enables the internal 2.25MHz oscillator frequency. 3615fb For more information www.linear.com/LTC3615 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts