Datasheet ADP2116 (Analog Devices)

Configurable, Dual 3 A/Single 6 A, Synchronous, Step-Down DC-to-DC Regulator Data Sheet ADP2116 FEATURES TYPICAL APPLICATION CIRCUIT V Configurable 3 A/3 A or 3 A/2 A dual-output load IN = 5V combinations or 6 A combined single-output load 10Ω 1µF High efficiency: up to 95% 100kΩ 100kΩ EN2 G EN1 Input voltage, V F IN: 2.75 V to 5.5 V VIN4 22µF VDD C VIN1 22µF Selectable fixed output voltage of 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, VIN5 OP VIN2 VIN6 VIN3 PGOOD2 PGOOD1 or 3.3 V, or adjustable output voltage to 0.6 V minimum PGOOD2 PGOOD1 3.3µH VOUT1 = 2.5V, 3A ±1.5% accurate reference voltage V SW1 OUT2 = 1.2V, 3A 2.2µH SW3 ADP2116 SW2 Selectable switching frequency of 300 kHz, 600 kHz, 1.2 MHz, SW4 47µF 22µF 47µF 100µF PGND1 PGND3 PGND2 or synchronized from 200 kHz to 2 MHz PGND4 FB1 Optimized gate slew rate for reduced EMI FB2 27kΩ V2SET V1SET External synchronization input or internal clock output 4.7kΩ SYNC SYNC/CLKOUT COMP1 Dual-phase, 180° phase-shifted PWM channels COMP2 SS1 30kΩ 10nF 30kΩ G SS2 10nF EQ D Current mode for fast transient response 820pF FR SCF GN 820pF Pulse skip mode with light loads or forced PWM operation 8.2kΩ Input undervoltage lockout (UVLO)
1 00
f
6-
Independent enable inputs and power-good outputs SW = 600kHz
43 08
Overcurrent and thermal overload protection
Figure 1.
Programmable soft start 32-lead, 5 mm × 5 mm LFCSP package Supported by ADIsimPower™ design t ool APPLICATIONS
synchronization pin is also configurable as a 90° out-of-phase
Point-of-load regulation
output clock, providing the possibility for a stackable multiphase
Telecommunications and networking systems
power solution.
Consumer electronics Industrial and instrumentation
The ADP2116 input voltage range is from 2.75 V to 5.5 V and can
Medical
convert to a fixed output of 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or 3.3 V that can be set independently for each channel using external
GENERAL DESCRIPTION
resistors. If a resistor divider is used, the output voltage can be The ADP2116 is a versatile, synchronous, step-down switching set as low as 0.6 V. The ADP2116 operates over the −40°C to regulator that satisfies a wide range of customer point-of-load +125°C junction temperature range. requirements. The two PWM channels can be configured to deliver
100
independent outputs at 3 A and 3 A (or at 3 A and 2 A) or can be
VIN = 5.0V; VOUT = 2.5V
configured as a single interleaved output capable of delivering 6 A.
95 VIN = 5.0V; VOUT = 3.3V
The two PWM channels are 180° phase shifted to reduce input
90
ripple current and input capacitance.
) 85
The ADP2116 provides high efficiency and can operate at
(% Y C
switching frequencies of up to 2 MHz. At light loads, the ADP2116
80 IEN
can be set to operate in pulse skip mode for higher efficiency or
IC F 75 EF
in forced PWM mode for noise sensitive applications.
70 VIN = 3.3V; VOUT = 1.2V
The ADP2116 is designed with an optimized slew rate to reduce EMI emissions, allowing the device to power sensitive, high perfor-
65
mance signal chain circuits. The switching frequency can be set
fSW = 600kHz 60
to 300 kHz, 600 kHz, or 1.2 MHz, or it can be synchronized to an
10 100 1k 10k
02 0 6- external clock that minimizes the system noise. The bidirectional
LOAD CURRENT (mA)
43 08 Figure 2. Typical Efficiency vs. Load Current
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS LINE AND LOAD REGULATION SUPPLY CURRENT LOAD TRANSIENT RESPONSE BASIC FUNCTIONALITY BODE PLOTS SIMPLIFIED BLOCK DIAGRAM THEORY OF OPERATION CONTROL ARCHITECTURE UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CONTROL SOFT START POWER GOOD PULSE SKIP MODE HICCUP MODE CURRENT LIMIT THERMAL OVERLOAD PROTECTION MAXIMUM DUTY CYCLE OPERATION SYNCHRONIZATION CONVERTER CONFIGURATION SELECTING THE OUTPUT VOLTAGE SETTING THE OSCILLATOR FREQUENCY SYNCHRONIZATION AND CLKOUT OPERATION MODE CONFIGURATION EXTERNAL COMPONENTS SELECTION ADIsimPower DESIGN TOOL INPUT CAPACITOR SELECTION VDD RC FILTER INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION CONTROL LOOP COMPENSATION DESIGN EXAMPLE CHANNEL 1 CONFIGURATION AND COMPONENTS SELECTION CHANNEL 2 CONFIGURATION AND COMPONENTS SELECTION SYSTEM CONFIGURATION APPLICATION CIRCUITS POWER DISSIPATION AND THERMAL CONSIDERATIONS CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE