Datasheet LTC3620 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Ultralow Power 15mA Synchronous Step-Down Switching Regulator |
| 页数 / 页 | 18 / 3 — ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply … |
| 文件格式/大小 | PDF / 331 Kb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply over the full operating
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LTC3620
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are for TA = 25°C (Note 2). VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VFMIN FMIN/MODE Input Voltage High 0.9 V FMIN/MODE Input Voltage Low 0.7 V fEXT FMIN/MODE Input Frequency 20 300 kHz IFMIN/MODE FMIN/MODE Pin Leakage Current ±0.01 ±1 μA ISW Switch Leakage Current VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V ±0.01 ±1 μA IFB VFB Pin Current LTC3620, VFB = 0.6V 0 ±30 nA LTC3620-1, VFB = 1.1V 1.2 2.0 μA VUVLO Undervoltage Lockout (UVLO) VIN Decreasing 2.7 2.8 2.9 V VLOBATB LOBATB Threshold Voltage VIN Decreasing 2.93 3.0 3.08 V RLOBATB LOBATB Pull-Down On-Resistance 15 Ω VHLOBATB LOBATB Hysteresis Voltage 100 mV RPFET RDS(ON) of P-channel FET (Note 4) ISW = 50mA, VIN = 3.6V 2.0 Ω RNFET RDS(ON) of N-channel FET (Note 4) ISW = –50mA, VIN = 3.6V 1.0 Ω
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings package thermal impedance and other environmental factors. The junction may cause permanent damage to the device. Exposure to any Absolute temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) Maximum Rating condition for extended periods may affect device and power dissipation (PD, in Watts) according to the formula: reliability and lifetime. TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal
Note 2:
The LTC3620 is tested under pulsed load conditions such that TJ ≈ TA. impedance. LTC3620E is guaranteed to meet specifi cations from 0°C to 85°C
Note 3:
The LTC3620 is tested in a proprietary test mode that connects VFB junction temperature. Specifi cations over the –40°C to 85°C operating to the output of the error amplifi er. junction temperature range are assured by design, characterization and
Note 4:
The DFN switch-on resistance is guaranteed by correlation to correlation with statistical process controls. Note that the maximum wafer level measurements. ambient temperature consistent with these specifi cations is determined by specifi c operating conditions in conjunction with board layout, the rated 3620fa 3 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATIONS RELATED PARTS
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are for TA = 25°C (Note 2). VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VFMIN FMIN/MODE Input Voltage High 0.9 V FMIN/MODE Input Voltage Low 0.7 V fEXT FMIN/MODE Input Frequency 20 300 kHz IFMIN/MODE FMIN/MODE Pin Leakage Current ±0.01 ±1 μA ISW Switch Leakage Current VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V ±0.01 ±1 μA IFB VFB Pin Current LTC3620, VFB = 0.6V 0 ±30 nA LTC3620-1, VFB = 1.1V 1.2 2.0 μA VUVLO Undervoltage Lockout (UVLO) VIN Decreasing 2.7 2.8 2.9 V VLOBATB LOBATB Threshold Voltage VIN Decreasing 2.93 3.0 3.08 V RLOBATB LOBATB Pull-Down On-Resistance 15 Ω VHLOBATB LOBATB Hysteresis Voltage 100 mV RPFET RDS(ON) of P-channel FET (Note 4) ISW = 50mA, VIN = 3.6V 2.0 Ω RNFET RDS(ON) of N-channel FET (Note 4) ISW = –50mA, VIN = 3.6V 1.0 Ω
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings package thermal impedance and other environmental factors. The junction may cause permanent damage to the device. Exposure to any Absolute temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) Maximum Rating condition for extended periods may affect device and power dissipation (PD, in Watts) according to the formula: reliability and lifetime. TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal
Note 2:
The LTC3620 is tested under pulsed load conditions such that TJ ≈ TA. impedance. LTC3620E is guaranteed to meet specifi cations from 0°C to 85°C
Note 3:
The LTC3620 is tested in a proprietary test mode that connects VFB junction temperature. Specifi cations over the –40°C to 85°C operating to the output of the error amplifi er. junction temperature range are assured by design, characterization and
Note 4:
The DFN switch-on resistance is guaranteed by correlation to correlation with statistical process controls. Note that the maximum wafer level measurements. ambient temperature consistent with these specifi cations is determined by specifi c operating conditions in conjunction with board layout, the rated 3620fa 3 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATIONS RELATED PARTS