Datasheet LTC3612 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 3A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter |
| 页数 / 页 | 30 / 10 — pin FuncTions (QFN/FE). DDR (Pin 1/Pin 8):. RT/SYNC (Pin 2/Pin 9):. MODE … |
| 文件格式/大小 | PDF / 416 Kb |
| 文件语言 | 英语 |
pin FuncTions (QFN/FE). DDR (Pin 1/Pin 8):. RT/SYNC (Pin 2/Pin 9):. MODE (Pin 17/Pin 4):. SGND (Pin 3/Pin 10):
该数据表的模型线
文件文字版本
LTC3612
pin FuncTions (QFN/FE) DDR (Pin 1/Pin 8):
DDR Mode Pin. Tying the DDR pin to window for more than 105µs the PGOOD pin is released. SVIN selects DDR mode and TRACK/SS can be used as If the FB voltage leaves the power good window for more an external reference input. If DDR is tied to SGND, the than 105µs the PGOOD pin is pulled down. internal 0.6V reference will be used. In DDR mode (DDR = VIN), the power good window moves
RT/SYNC (Pin 2/Pin 9):
Oscillator Frequency. This pin in relation to the actual TRACK/SS pin voltage. During provides three ways of setting the constant switching up/down tracking the PGOOD pin is always pulled down. frequency: In shutdown the PGOOD output will actively pull down 1. Connecting a resistor from RT/SYNC to ground will set and may be used to discharge the output capacitors via the switching frequency based on the resistor value. an external resistor. 2. Driving the RT/SYNC pin with an external clock signal
MODE (Pin 17/Pin 4):
Mode Selection. Tying the MODE will synchronize the LTC3612 to the applied frequency. pin to SVIN or SGND enables pulse-skipping mode or Burst The slope compensation is automatically adapted to the Mode operation (with an internal Burst Mode clamp), external clock frequency. respectively. If this pin is held at slightly higher than half 3. Tying the RT/SYNC pin to SV of SV IN enables the internal IN, forced continuous mode is selected. Connecting 2.25MHz oscillator frequency. this pin to an external voltage selects Burst Mode opera- tion with the burst clamp set to the pin voltage. See the
SGND (Pin 3/Pin 10):
Signal Ground. All small-signal and Operation section for more details. compensation components should connect to this ground, which in turn should connect to PGND at a single point.
VFB (Pin 18/Pin 5):
Voltage Feedback Input Pin. Senses the feedback voltage from the external resistive divider
NC (Pins 4, 7, 10/Pins 11, 13, 18):
Can be connected to across the output. ground or left open.
ITH (Pin 19/Pin 6):
Error Amplifier Compensation. The
SW (Pins 5, 6, 11, 12/Pins 12, 14, 17, 19):
Switch Node. current comparator’s threshold increases with this control Connection to the inductor. This pin connects to the drains voltage. Tying this pin to SVIN enables internal compensa- of the internal synchronous power MOSFET switches. tion and AVP mode.
PVIN (Pins 8, 9/Pins 15, 16):
Power Input Supply. PVIN
TRACK/SS (Pin 20/Pin 7):
Track/External Soft-Start/ connects to the source of the internal P-channel power External Reference. Start-up behavior is programmable MOSFET. This pin is independent of SVIN and may be con- with the TRACK/SS pin: nected to the same voltage or to a lower voltage supply. 1. Tying this pin to SVIN selects the internal soft-start
PVIN_DRV (Pin 13/Pin 20):
Internal Gate Driver Input Sup- circuit. ply. This pin must be connected to PVIN. 2. External soft-start timing can be programmed with a
SVIN (Pin 14/Pin 1):
Signal Input Supply. This pin pow- capacitor to ground and a resistor to SVIN. ers the internal control circuitry and is monitored by the undervoltage lockout comparator. 3. TRACK/SS can be used to force the LTC3612 to track the start-up behavior of another supply.
RUN (Pin 15/Pin 2):
Enable Pin. Forcing this pin to ground shuts down the LTC3612. In shutdown, all functions are The pin can also be used as external reference input. See disabled and the chip draws <1µA of supply current. the Applications Information section for more information.
PGOOD (Pin 16/Pin 3):
Power Good. This open-drain
PGND (Pin 21/Pin 21):
Power Ground. The exposed pad output is pulled down to SGND on start-up and while the connects to the source of the internal N-channel power FB voltage is outside the power good voltage window. If MOSFET. This pin should be connected close to the (–) the FB voltage increases and stays inside the power good terminal of CIN and COUT and soldered to PCB ground for rated thermal performance. 3612fc 10 For more information www.linear.com/LTC3612 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Package Description Typical Application Related Parts
pin FuncTions (QFN/FE) DDR (Pin 1/Pin 8):
DDR Mode Pin. Tying the DDR pin to window for more than 105µs the PGOOD pin is released. SVIN selects DDR mode and TRACK/SS can be used as If the FB voltage leaves the power good window for more an external reference input. If DDR is tied to SGND, the than 105µs the PGOOD pin is pulled down. internal 0.6V reference will be used. In DDR mode (DDR = VIN), the power good window moves
RT/SYNC (Pin 2/Pin 9):
Oscillator Frequency. This pin in relation to the actual TRACK/SS pin voltage. During provides three ways of setting the constant switching up/down tracking the PGOOD pin is always pulled down. frequency: In shutdown the PGOOD output will actively pull down 1. Connecting a resistor from RT/SYNC to ground will set and may be used to discharge the output capacitors via the switching frequency based on the resistor value. an external resistor. 2. Driving the RT/SYNC pin with an external clock signal
MODE (Pin 17/Pin 4):
Mode Selection. Tying the MODE will synchronize the LTC3612 to the applied frequency. pin to SVIN or SGND enables pulse-skipping mode or Burst The slope compensation is automatically adapted to the Mode operation (with an internal Burst Mode clamp), external clock frequency. respectively. If this pin is held at slightly higher than half 3. Tying the RT/SYNC pin to SV of SV IN enables the internal IN, forced continuous mode is selected. Connecting 2.25MHz oscillator frequency. this pin to an external voltage selects Burst Mode opera- tion with the burst clamp set to the pin voltage. See the
SGND (Pin 3/Pin 10):
Signal Ground. All small-signal and Operation section for more details. compensation components should connect to this ground, which in turn should connect to PGND at a single point.
VFB (Pin 18/Pin 5):
Voltage Feedback Input Pin. Senses the feedback voltage from the external resistive divider
NC (Pins 4, 7, 10/Pins 11, 13, 18):
Can be connected to across the output. ground or left open.
ITH (Pin 19/Pin 6):
Error Amplifier Compensation. The
SW (Pins 5, 6, 11, 12/Pins 12, 14, 17, 19):
Switch Node. current comparator’s threshold increases with this control Connection to the inductor. This pin connects to the drains voltage. Tying this pin to SVIN enables internal compensa- of the internal synchronous power MOSFET switches. tion and AVP mode.
PVIN (Pins 8, 9/Pins 15, 16):
Power Input Supply. PVIN
TRACK/SS (Pin 20/Pin 7):
Track/External Soft-Start/ connects to the source of the internal P-channel power External Reference. Start-up behavior is programmable MOSFET. This pin is independent of SVIN and may be con- with the TRACK/SS pin: nected to the same voltage or to a lower voltage supply. 1. Tying this pin to SVIN selects the internal soft-start
PVIN_DRV (Pin 13/Pin 20):
Internal Gate Driver Input Sup- circuit. ply. This pin must be connected to PVIN. 2. External soft-start timing can be programmed with a
SVIN (Pin 14/Pin 1):
Signal Input Supply. This pin pow- capacitor to ground and a resistor to SVIN. ers the internal control circuitry and is monitored by the undervoltage lockout comparator. 3. TRACK/SS can be used to force the LTC3612 to track the start-up behavior of another supply.
RUN (Pin 15/Pin 2):
Enable Pin. Forcing this pin to ground shuts down the LTC3612. In shutdown, all functions are The pin can also be used as external reference input. See disabled and the chip draws <1µA of supply current. the Applications Information section for more information.
PGOOD (Pin 16/Pin 3):
Power Good. This open-drain
PGND (Pin 21/Pin 21):
Power Ground. The exposed pad output is pulled down to SGND on start-up and while the connects to the source of the internal N-channel power FB voltage is outside the power good voltage window. If MOSFET. This pin should be connected close to the (–) the FB voltage increases and stays inside the power good terminal of CIN and COUT and soldered to PCB ground for rated thermal performance. 3612fc 10 For more information www.linear.com/LTC3612 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Package Description Typical Application Related Parts