Datasheet ADP5022 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Dual 3 MHz, 600 mA Buck Regulator with 150 mA LDO |
| 页数 / 页 | 28 / 3 — ADP5022. SPECIFICATIONS. Table 1. Parameter Symbol. Test. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 1.1 Mb |
| 文件语言 | 英语 |
ADP5022. SPECIFICATIONS. Table 1. Parameter Symbol. Test. Conditions/Comments. Min. Typ. Max. Unit
该数据表的模型线
文件文字版本
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ADP5022 SPECIFICATIONS
VDDA = VIN1 = VIN2 = 3.6 V, VIN3 = (VOUT3 + 0.5 V) or 2.4 V, whichever is greater, VIN3 ≤ VIN1, TJ = −40°C to +125°C, unless otherwise noted.1
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT VOLTAGE RANGE System and Buck Input Supplies Voltage Range VDDA, VIN1, Low UVLO level models 2.4 5.5 V and VIN2 High UVLO level models 4.5 5.5 V LDO Input Supply Voltage Range VIN3 2.3 5.5 V SHUTDOWN CURRENT IGND-SD EN1 = EN2 = EN3 = GND 0.5 μA EN1 = EN2 = EN3 = GND 2 μA TJ = −40°C to +85°C THERMAL SHUTDOWN Thermal Shutdown Threshold TSDTH TJ rising 150 °C Thermal Shutdown Hysteresis TSDHYS 20 °C EN1, EN2, EN3, MODE INPUTS EN1, EN2, EN3, MODE Input Logic High VIH VDDA = VIN1 = VIN2 1.2 V EN1, EN2, EN3, MODE Input Logic Low VIL VDDA = VIN1 = VIN2 0.4 V EN1, EN2, EN3, MODE Input Leakage Current VI-LEAKAGE Pin at (VDDA = VIN1 = VIN2) or GND 0.05 1 μA STANDBY CURRENT All Channels Enabled, No Load ISTBY 80 μA All Channels Enabled, No Load, No Buck Switching ISTBY-NOSW 59 85 μA VIN3 UNDERVOLTAGE LOCKOUT Input Voltage Rising UVLOVIN3RISE 2.20 V Input Voltage Falling UVLOVIN3FALL 1.45 V VDDA UNDERVOLTAGE LOCKOUT Input Voltage Rising UVLOVDDARISE High UVLO level (factory programmed) 4.15 V Low UVLO level (factory programmed) 2.35 V Input Voltage Falling UVLOVDDAFALL High UVLO level (factory programmed) 3.40 V Low UVLO level (factory programmed) 2.00 V 1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control. Rev. C | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BUCK1 AND BUCK2 SPECIFICATIONS LDO SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator/Phasing of Inductor Switching Enable/Shutdown Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION LDO Undervoltage Lockout APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Inductor Output Capacitor Input Capacitor LDO CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PCB LAYOUT GUIDELINES EVALUATION BOARD SCHEMATICS AND ARTWORK SUGGESTED LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
ADP5022 SPECIFICATIONS
VDDA = VIN1 = VIN2 = 3.6 V, VIN3 = (VOUT3 + 0.5 V) or 2.4 V, whichever is greater, VIN3 ≤ VIN1, TJ = −40°C to +125°C, unless otherwise noted.1
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT VOLTAGE RANGE System and Buck Input Supplies Voltage Range VDDA, VIN1, Low UVLO level models 2.4 5.5 V and VIN2 High UVLO level models 4.5 5.5 V LDO Input Supply Voltage Range VIN3 2.3 5.5 V SHUTDOWN CURRENT IGND-SD EN1 = EN2 = EN3 = GND 0.5 μA EN1 = EN2 = EN3 = GND 2 μA TJ = −40°C to +85°C THERMAL SHUTDOWN Thermal Shutdown Threshold TSDTH TJ rising 150 °C Thermal Shutdown Hysteresis TSDHYS 20 °C EN1, EN2, EN3, MODE INPUTS EN1, EN2, EN3, MODE Input Logic High VIH VDDA = VIN1 = VIN2 1.2 V EN1, EN2, EN3, MODE Input Logic Low VIL VDDA = VIN1 = VIN2 0.4 V EN1, EN2, EN3, MODE Input Leakage Current VI-LEAKAGE Pin at (VDDA = VIN1 = VIN2) or GND 0.05 1 μA STANDBY CURRENT All Channels Enabled, No Load ISTBY 80 μA All Channels Enabled, No Load, No Buck Switching ISTBY-NOSW 59 85 μA VIN3 UNDERVOLTAGE LOCKOUT Input Voltage Rising UVLOVIN3RISE 2.20 V Input Voltage Falling UVLOVIN3FALL 1.45 V VDDA UNDERVOLTAGE LOCKOUT Input Voltage Rising UVLOVDDARISE High UVLO level (factory programmed) 4.15 V Low UVLO level (factory programmed) 2.35 V Input Voltage Falling UVLOVDDAFALL High UVLO level (factory programmed) 3.40 V Low UVLO level (factory programmed) 2.00 V 1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control. Rev. C | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BUCK1 AND BUCK2 SPECIFICATIONS LDO SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Oscillator/Phasing of Inductor Switching Enable/Shutdown Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION LDO Undervoltage Lockout APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Inductor Output Capacitor Input Capacitor LDO CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PCB LAYOUT GUIDELINES EVALUATION BOARD SCHEMATICS AND ARTWORK SUGGESTED LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE