Datasheet LTC3409A (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 600mA Low VIN Buck Regulator in 3mm × 3mm DFN |
| 页数 / 页 | 16 / 7 — PIN FUNCTIONS. VFB (Pin 1):. SYNC (Pin 8):. GND (Pin 2):. VIN (Pins 3, … |
| 文件格式/大小 | PDF / 321 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS. VFB (Pin 1):. SYNC (Pin 8):. GND (Pin 2):. VIN (Pins 3, 4):. MODE (Pin 5):. SW (Pin 6):. Exposed Pad. (Pin 9):
该数据表的模型线
文件文字版本
LTC3409A
PIN FUNCTIONS VFB (Pin 1):
Feedback Pin. Receives the feedback voltage
SYNC (Pin 8):
External CLK Input/Fixed Switching Fre- from an external resistive divider across the output. quency Selection. Forcing this pin above 1.1V for greater
GND (Pin 2):
Ground Pin. than 30μs selects 2.6MHz switching frequency. Forcing this pin below 0.3V for greater than 30μs selects 1.7MHz
VIN (Pins 3, 4):
Main Supply Pins. Must be closely de- switching frequency. coupled to GND, Pin 2 and Pin 9, with a 4.7μF or greater ceramic capacitor. External clock input, 1MHz to 3MHz frequency range. When the SYNC pin is clocked in this frequency range
MODE (Pin 5):
Mode Select Input. To select pulse-skipping the SYNC threshold is nominally 0.63V. To allow for good mode, force this pin above 1.1V. Forcing this pin below noise immunity, SYNC signal should swing at least 0.3V 0.3V selects Burst Mode operation. Do not leave MODE below and above this nominal value (0.33V to 0.93V). Do fl oating. not leave SYNC fl oating.
SW (Pin 6):
Switch Node Connection to Inductor. This pin
Exposed Pad (Pin 9):
The Exposed Pad is ground. It must connects to the drains of the internal main and synchronous be soldered to PCB ground to provide both electrical contact power MOSFET switches. and optimum thermal performance.
RUN (Pin 7):
Run Control Input. Forcing this pin above 1.1V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1μA supply current. Do not leave RUN fl oating.
FUNCTIONAL DIAGRAM
MODE 5 SLOPE SYNC COMP 0.65V 8 PLL OSC 3, 4 VIN – VFB EN + – 1 SLEEP + 0.612V 5Ω – 0.4V + – + I EA COMP BURST S Q SOFT- R Q START SWITCHING RS LATCH LOGIC VIN AND ANTI- BLANKING SHOOT- CIRCUIT THRU 6 SW RUN + 7 REFERENCE OV OVDET 0.675 – + SHUTDOWN I 2, 9 RCMP – GND 3409A FD 3409af 7
PIN FUNCTIONS VFB (Pin 1):
Feedback Pin. Receives the feedback voltage
SYNC (Pin 8):
External CLK Input/Fixed Switching Fre- from an external resistive divider across the output. quency Selection. Forcing this pin above 1.1V for greater
GND (Pin 2):
Ground Pin. than 30μs selects 2.6MHz switching frequency. Forcing this pin below 0.3V for greater than 30μs selects 1.7MHz
VIN (Pins 3, 4):
Main Supply Pins. Must be closely de- switching frequency. coupled to GND, Pin 2 and Pin 9, with a 4.7μF or greater ceramic capacitor. External clock input, 1MHz to 3MHz frequency range. When the SYNC pin is clocked in this frequency range
MODE (Pin 5):
Mode Select Input. To select pulse-skipping the SYNC threshold is nominally 0.63V. To allow for good mode, force this pin above 1.1V. Forcing this pin below noise immunity, SYNC signal should swing at least 0.3V 0.3V selects Burst Mode operation. Do not leave MODE below and above this nominal value (0.33V to 0.93V). Do fl oating. not leave SYNC fl oating.
SW (Pin 6):
Switch Node Connection to Inductor. This pin
Exposed Pad (Pin 9):
The Exposed Pad is ground. It must connects to the drains of the internal main and synchronous be soldered to PCB ground to provide both electrical contact power MOSFET switches. and optimum thermal performance.
RUN (Pin 7):
Run Control Input. Forcing this pin above 1.1V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1μA supply current. Do not leave RUN fl oating.
FUNCTIONAL DIAGRAM
MODE 5 SLOPE SYNC COMP 0.65V 8 PLL OSC 3, 4 VIN – VFB EN + – 1 SLEEP + 0.612V 5Ω – 0.4V + – + I EA COMP BURST S Q SOFT- R Q START SWITCHING RS LATCH LOGIC VIN AND ANTI- BLANKING SHOOT- CIRCUIT THRU 6 SW RUN + 7 REFERENCE OV OVDET 0.675 – + SHUTDOWN I 2, 9 RCMP – GND 3409A FD 3409af 7