Datasheet LTC3564 (Analog Devices) - 8

LTC3564
U OPERATIO (Refer to Functional Diagram) Main Control Loop Short-Circuit Protection
The LTC3564 uses a constant frequency, current mode When the output is shorted to ground, the inductor current step-down architecture. Both the main (P-channel may exceed the maximum inductor peak current if not MOSFET) and synchronous (N-channel MOSFET) switches allowed enough time to decay. To prevent the inductor are internal. During normal operation, the internal top current from running away, the bottom N-channel MOSFET power MOSFET is turned on each cycle when the oscillator is allowed to stay on for more than one cycle, thereby sets the RS latch, and turned off when the current com- allowing the inductor current time to decay. parator, ICOMP, resets the RS latch. The peak inductor current at which I
Dropout Operation
COMP resets the RS latch, is controlled by the output of error amplifier EA. When the load current As the input supply voltage decreases to a value approach- increases, it causes a slight decrease in the feedback ing the output voltage, the duty cycle increases toward the voltage, FB, relative to the 0.6V reference, which in turn, maximum on-time. Further reduction of the supply voltage causes the EA amplifier’s output voltage to increase until forces the main switch to remain on for more than one cycle the average inductor current matches the new load cur- until it reaches 100% duty cycle. The output voltage will then rent. While the top MOSFET is off, the bottom MOSFET is be determined by the input voltage minus the voltage drop turned on until either the inductor current starts to reverse, across the P-channel MOSFET and the inductor. as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. An important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases
Burst Mode Operation
(see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the The LTC3564 is capable of Burst Mode operation in which LTC3564 is used at 100% duty cycle with low input voltage the internal power MOSFETs operate intermittently based (See Thermal Considerations in the Applications Informa- on load demand. tion section). In Burst Mode operation, the peak current of the inductor is set to approximately 180mA regardless of the output
Slope Compensation and Inductor Peak Current
load. Each burst event can last from a few cycles at light Slope compensation provides stability in constant fre- loads to almost continuously cycling with short sleep quency architectures by preventing subharmonic oscilla- intervals at moderate loads. In between these burst events, tions at high duty cycles. It is accomplished internally by the power MOSFETs and any unneeded circuitry are turned adding a compensating ramp to the inductor current off, reducing the quiescent current to 20μA. In this sleep signal at duty cycles in excess of 40%. Normally, this state, the load current is being supplied solely from the results in a reduction of maximum inductor peak current output capacitor. As the output voltage droops, the EA for duty cycles > 40%. However, the LTC3564 uses a amplifier’s output rises above the sleep threshold signal- patented scheme that counteracts this compensating ramp, ing the BURST comparator to trip and turn the top MOSFET which allows the maximum inductor peak current to on. This process repeats at a rate that is dependent on the remain unaffected throughout all duty cycles. load demand. 3564f 8