Datasheet LTC3407A-2 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Dual Synchronous 800mA, 2.25MHz Step-Down DC/DC Regulator |
| 页数 / 页 | 16 / 6 — PI FU CTIO S. FB1 (Pin 1):. SW2 (Pin 7):. RUN/SS1 (Pin 2):. POR (Pin 8):. … |
| 文件格式/大小 | PDF / 281 Kb |
| 文件语言 | 英语 |
PI FU CTIO S. FB1 (Pin 1):. SW2 (Pin 7):. RUN/SS1 (Pin 2):. POR (Pin 8):. VIN (Pin 3):. RUN/SS2 (Pin 9):. SW1 (Pin 4):. GND (Pin 5):
该数据表的模型线
文件文字版本
LTC3407A-2
U U U PI FU CTIO S V
be synchronized to an external oscillator applied to this pin
FB1 (Pin 1):
Output Feedback. Receives the feedback voltage from the external resistive divider across the and pulse skipping mode is automatically selected. output. Nominal voltage for this pin is 0.6V.
SW2 (Pin 7):
Regulator 2 Switch Node Connection to the
RUN/SS1 (Pin 2):
Regulator 1 Enable and Soft-Start Input. Inductor. This pin swings from VIN to GND. Forcing this pin to VIN enables regulator 1, while forcing it
POR (Pin 8):
Power-On Reset. This common-drain logic to GND causes regulator 1 to shut down. Connect external output is pulled to GND when the output voltage is not RC-network with desired time-constant to enable soft- within ±8.5% of regulation and goes high after 216 clock start feature. This pin must be driven; do not float. cycles when both channels are within regulation.
VIN (Pin 3):
Main Power Supply. Must be closely decoupled
RUN/SS2 (Pin 9):
Regulator 2 Enable and Soft-Start Input. to GND. Forcing this pin to VIN enables regulator 2, while forcing it
SW1 (Pin 4):
Regulator 1 Switch Node Connection to the to GND causes regulator 2 to shut down. Connect external Inductor. This pin swings from V RC-Network with desired time-constant to enable soft- IN to GND. start feature. This pin must be driven; do not float.
GND (Pin 5):
Main Ground. Connect to the (–) terminal of C
V
OUT, and (–) terminal of CIN.
FB2 (Pin 10):
Output Feedback. Receives the feedback voltage from the external resistive divider across the
MODE/SYNC (Pin 6):
Combination Mode Selection and output. Nominal voltage for this pin is 0.6V. Oscillator Synchronization. This pin controls the operation of the device. When tied to V
Exposed Pad (GND) (Pin 11):
Power Ground. Connect to IN or GND, Burst Mode operation or pulse skipping mode is selected, respec- the (–) terminal of COUT, and (–) terminal of CIN. Must be tively. Do not float this pin. The oscillation frequency can soldered to electrical ground on PCB.
W BLOCK DIAGRA
REGULATOR 1 MODE/SYNC 6 BURST VIN CLAMP SLOPE COMP – EN 0.6V + I SLEEP – + TH 5Ω EA ICOMP 0.65V + V 1 FB1 – BURST S Q 0.55V – RS UV LATCH UVDET R Q SWITCHING + LOGIC ANTI AND SHOOT- BLANKING THRU 4 CIRCUIT SW1 + OV OVDET + 0.65V – IRCMP – 11 GND SHUTDOWN V 3 PGOOD1 IN VIN 8 POR RUN/SS1 2 POR 0.6V REF OSC COUNTER RUN/SS2 9 OSC 5 GND PGOOD2 REGULATOR 2 (IDENTICAL TO REGULATOR 1) V 10 7 SW2 FB2 3407A2 BD 3407a2f 6
U U U PI FU CTIO S V
be synchronized to an external oscillator applied to this pin
FB1 (Pin 1):
Output Feedback. Receives the feedback voltage from the external resistive divider across the and pulse skipping mode is automatically selected. output. Nominal voltage for this pin is 0.6V.
SW2 (Pin 7):
Regulator 2 Switch Node Connection to the
RUN/SS1 (Pin 2):
Regulator 1 Enable and Soft-Start Input. Inductor. This pin swings from VIN to GND. Forcing this pin to VIN enables regulator 1, while forcing it
POR (Pin 8):
Power-On Reset. This common-drain logic to GND causes regulator 1 to shut down. Connect external output is pulled to GND when the output voltage is not RC-network with desired time-constant to enable soft- within ±8.5% of regulation and goes high after 216 clock start feature. This pin must be driven; do not float. cycles when both channels are within regulation.
VIN (Pin 3):
Main Power Supply. Must be closely decoupled
RUN/SS2 (Pin 9):
Regulator 2 Enable and Soft-Start Input. to GND. Forcing this pin to VIN enables regulator 2, while forcing it
SW1 (Pin 4):
Regulator 1 Switch Node Connection to the to GND causes regulator 2 to shut down. Connect external Inductor. This pin swings from V RC-Network with desired time-constant to enable soft- IN to GND. start feature. This pin must be driven; do not float.
GND (Pin 5):
Main Ground. Connect to the (–) terminal of C
V
OUT, and (–) terminal of CIN.
FB2 (Pin 10):
Output Feedback. Receives the feedback voltage from the external resistive divider across the
MODE/SYNC (Pin 6):
Combination Mode Selection and output. Nominal voltage for this pin is 0.6V. Oscillator Synchronization. This pin controls the operation of the device. When tied to V
Exposed Pad (GND) (Pin 11):
Power Ground. Connect to IN or GND, Burst Mode operation or pulse skipping mode is selected, respec- the (–) terminal of COUT, and (–) terminal of CIN. Must be tively. Do not float this pin. The oscillation frequency can soldered to electrical ground on PCB.
W BLOCK DIAGRA
REGULATOR 1 MODE/SYNC 6 BURST VIN CLAMP SLOPE COMP – EN 0.6V + I SLEEP – + TH 5Ω EA ICOMP 0.65V + V 1 FB1 – BURST S Q 0.55V – RS UV LATCH UVDET R Q SWITCHING + LOGIC ANTI AND SHOOT- BLANKING THRU 4 CIRCUIT SW1 + OV OVDET + 0.65V – IRCMP – 11 GND SHUTDOWN V 3 PGOOD1 IN VIN 8 POR RUN/SS1 2 POR 0.6V REF OSC COUNTER RUN/SS2 9 OSC 5 GND PGOOD2 REGULATOR 2 (IDENTICAL TO REGULATOR 1) V 10 7 SW2 FB2 3407A2 BD 3407a2f 6