Datasheet LTC3544 (Analog Devices) - 9

LTC3544
OPERATION (Refer to Functional Diagrams)
The LTC3544 uses a constant-frequency current mode architecture. The operating frequency is set at 2.25MHz. V All channels share the same clock and run in-phase. OUT100 VOUT200A The output voltage for each regulator is set by an external VOUT200B resistor divider returned to the V VOUT300 FB pin. An error ampli- fi er compares the divided output voltage with a reference RUNx voltage of 0.8V and regulates the peak inductor current accordingly. V 200 3544 G12 IN = 3.6V μs/DIV TA = 25°C ALL CHANNELS UNLOADED
Main Control Loop Figure 1. Regulator Soft-Start
During normal operation, the top power switch (P-channel
Soft-Start
MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The Soft-start reduces surge currents on VIN and output current into the inductor and the load increases until the overshoot during start-up. Soft-start on the LTC3544 is peak inductor current (controlled by ITH) is reached. The RS implemented by internally ramping the reference signal latch turns off the top switch, turns on the bottom switch, fed to the error amplifi er over approximately a 1ms period. and energy stored in the inductor is discharged through Figure 1 shows the behavior of the four regulator channels the bottom switch (N-channel MOSFET) into the load until during soft-start. the next clock cycle begins, or until the inductor current
Short-Circuit Protection
begins to reverse (sensed by the IRCMP comparator). Short-circuit protection is achieved by monitoring the in- The peak inductor current is controlled by the internally ductor current. When the current exceeds a predetermined compensated ITH voltage, which is the output of the er- level, the main switch is turned off, and the synchronous ror amplifi er. This amplifi er regulates the VFB pin to the switch is turned on long enough to allow the current in the internal 0.8V reference by adjusting the peak inductor inductor to decay below the fault threshold. This prevents current accordingly. a catastrophic inductor current, run-away condition, but will still provide current to the output. Output voltage
Burst Mode Operation
regulation in this condition is not achieved. To optimize effi ciency, the LTC3544 automatically switches from continuous operation to Burst Mode operation when
DROPOUT OPERATION
the load current is relatively light. During Burst Mode operation, the peak inductor current (as set by I As the input supply voltage decreases to a value approach- TH) re- mains fi xed at a low level and the PMOS switch operates ing the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage intermittently based on load demand. By running cycles forces the main switch to remain on for more than one cycle periodically, the switching losses are minimized. until it reaches 100% duty cycle. The output voltage will The duration of each burst event can range from a few then be determined by the input voltage minus the voltage cycles at light load to almost continuous cycling with drop across the P-channel MOSFET and the inductor. An short sleep intervals at moderate loads. During the sleep important detail to remember is that at low input supply intervals, the load current is being supplied solely from voltages, the RDS(ON) of the P-channel switch increases the output capacitor. As the output voltage droops, the (see Typical Performance Characteristics). Therefore, error amplifi er output rises above the sleep threshold, the user should calculate the power dissipation when signaling the burst comparator to trip and turn the top the LTC3544 is used at 100% duty cycle with low input MOSFET on. This cycle repeats at a rate that is dependent voltage (see Thermal Considerations in the Applications on load demand. Information section). 3544fa 9