Datasheet LT3503 (Analog Devices) - 8

LT3503
U U W U APPLICATIO S I FOR ATIO FB Resistor Network
In pulse-skipping mode the part skips pulses to control the The output voltage is programmed with a resistor divider inductor current and regulate the output voltage, possibly between the output and the FB pin. Choose the 1% producing a spectrum of frequencies below 2.2MHz. resistors according to: Note that this is a restriction on the operating input voltage to remain in constant-frequency operation; the circuit will V ⎞ R = ⎛ R OUT 1 2 – 1 tolerate transient inputs up to the absolute maximum ⎝⎜ 0 78V ⎠⎟ . ratings of the VIN and BOOST pins when the output is in R2 should be 20.0k or less to avoid bias current errors. regulation. The input voltage should be limited to VIN(PS) Reference designators refer to the Block Diagram. during overload conditions (short-circuit or start-up). An optional phase lead capacitor of 22pF between VOUT
Minimum On Time
and FB reduces light-load output ripple. The part will still regulate the output at input voltages that
Input Voltage Range
exceed VIN(PS) (up to 20V), but the output voltage ripple increases. Figure 1 illustrates switching waveforms in The input voltage range for LT3503 applications depends continuous mode for a 0.78V output application near on the output voltage and on the absolute maximum VIN(PS) = 6V. ratings of the VIN and BOOST pins. As the input voltage is increased, the part is required to The minimum input voltage is determined by either the switch for shorter periods of time. Delays associated with LT3503’s minimum operating voltage of 3.6V, or by its turning off the power switch dictate the minimum on time maximum duty cycle. The duty cycle is the fraction of time of the part. The minimum on time for the LT3503 is that the internal switch is on and is determined by the input ~130ns. Figure 2 illustrates the switching waveforms and output voltages: when the input voltage is increased to VIN = 14V. V V DC OUT D = + V – V + V IN SW D VSW 10V/DIV where V I D is the forward voltage drop of the catch diode L 1A/DIV (~0.4V) and VSW is the voltage drop of the internal switch V (~0.4V at maximum load). This leads to a minimum input OUT 20mV/DIV voltage of: COUT = 47µF 1µs/DIV 3503 F01 V V VOUT = 0.78V V OUT D = + V + V VIN = 7V IN MIN ( ) – D SW DC ILOAD = 1.1A MAX L = 1.1µH
Figure 1
with DCMAX = 0.81 (0.76 over temperature). The maximum input voltage is determined by the absolute V maximum ratings of the V SW IN and BOOST pins. For con- 10V/DIV stant-frequency operation the maximum input voltage is IL determined by the minimum duty cycle, DC 1A/DIV MIN = 0.29. If the duty cycle requirement is less than DC V MIN, the part will OUT 20mV/DIV enter pulse-skipping mode. The onset of pulse-skipping occurs at: COUT = 47µF 1µs/DIV 3503 F02 VOUT = 0.78V VIN = 14V V V I V OUT D = + V + V LOAD = 1.1A IN P ( S) – D SW L = 1.1µH DCMIN
Figure 2
3503f 8