Datasheet LTC3446 (Analog Devices) - 10

LTC3446
operaTion
switch intermittently based on load demand rather than rent with a typical dropout voltage of only 70mV. A single at a constant frequency. Every switch cycle during Burst ceramic capacitor as small as 1µF is all that is required Mode operation delivers more energy than would occur for output bypassing. A low reference voltage of 400mV in constant frequency operation, minimizing the switch- allows the VLDO regulators to be programmed to much ing loss per unit of energy delivered. Since the dominant lower voltages than available in common LDOs. power loss at light loads is gate charge switching loss in As shown in the Block Diagram, the V the power MOSFETs, operating in Burst Mode operation IN input supplies the internal reference and biases the VLDO circuitry while can dramatically improve light load efficiency. The tradeoff all output current comes directly from the LV is higher output ripple than in constant frequency opera- IN input for high efficiency regulation. The low per-VLDO quiescent tion, as well as the presence of noise below the 2.25MHz supply currents I clock frequency. LVIN = 4µA, IVIN = 80µA drop to ILVIN < 2µA, IVIN < 1µA in shutdown, are well-suited to battery- If MODESEL were instead tied to VIN, pulse skipping mode powered systems. is selected. In this mode, the buck converter continues to Each VLDO includes current limit protection. The fast switch at a constant frequency down to very light loads transient response of the follower output stage overcomes where it will eventually begin skipping pulses. Because the traditional tradeoff between dropout voltage, quiescent constant frequency operation is extended down to light current and load transient response inherent in most LDO loads, low output ripple is maintained and any coupled regulator architectures. Overshoot detection circuitry is or radiated noise is at or higher than the clock frequency. included to bring the output back into regulation when The tradeoff is lower efficiency compared to Burst Mode going from heavy to light output loads (“load-dump” operation. handling).
Dropout Operation POWER GOOD CIRCUIT OPERATION
When the input supply voltage decreases toward the output voltage, the duty cycle increases to 100%, which The LTC3446 has a built-in supply monitor. The feedback is known as the dropout condition. In dropout, the PMOS voltage of each enabled supply is monitored by a window switch is turned on continuously with the output voltage comparator to determine whether it is within 8% of its equal to the input voltage minus any voltage drop across target value. If they all are, then the PGOOD pin becomes the PMOS switch and the external inductor. high impedance. If no supply is enabled, or if any enabled supply is more than 8% away from its target, then the
VLDO LINEAR REGULATOR OPERATION
PGOOD pin is driven to ground by an internal open-drain NMOS. The two micropower, VLDO (very low dropout) linear regulators in the LTC3446 operate from input voltages as The PGOOD pin may be connected through a pull-up low as 0.9V. Each VLDO regulator provides a high accuracy resistor to a supply voltage of up to 5.5V, independent of output that is capable of supplying 300mA of output cur- the VIN pin voltage. 3446ff 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts