Datasheet LTC3412A (Analog Devices) - 9

LTC3412A
OPERATION
The operating frequency is externally set by an external Pulse-skipping operation is implemented by connecting resistor connected between the RT pin and ground. The the SYNC/MODE pin to ground. This forces the burst practical switching frequency can range from 300kHz to clamp level to be at 0V. As the load current decreases, the 4MHz. peak inductor current will be determined by the voltage Overvoltage and undervoltage comparators will pull the on the ITH pin until the ITH voltage drops below 400mV. At PGOOD output low if the output voltage comes out of this point, the peak inductor current is determined by the regulation by ±7.5%. In an overvoltage condition, the top minimum on-time of the current comparator. If the load power MOSFET is turned off and the bottom power MOSFET demand is less than the average of the minimum on-time is switched on until either the overvoltage condition clears inductor current, switching cycles will be skipped to keep or the bottom MOSFET’s current limit is reached. the output voltage in regulation.
Forced Continuous Mode Frequency Synchronization
Connecting the SYNC/MODE pin to SV The internal oscillator of the LTC3412A can be synchro- IN will disable Burst Mode operation and force continuous current operation. nized to an external clock connected to the SYNC/MODE At light loads, forced continuous mode operation is less pin. The frequency of the external clock can be in the efficient than Burst Mode operation, but may be desirable in range of 300kHz to 4MHz. For this application, the oscil- some applications where it is necessary to keep switching lator timing resistor should be chosen to correspond to harmonics out of a signal band. The output voltage ripple a frequency that is 25% lower than the synchronization is minimized in this mode. frequency. During synchronization, the burst clamp is set to 0V, and each switching cycle begins at the falling edge
Burst Mode Operation
of the clock signal. Connecting the SYNC/MODE pin to a voltage in the range
Dropout Operation
of 0V to 1V enables Burst Mode operation. In Burst Mode operation, the internal power MOSFETs operate intermit- When the input supply voltage decreases toward the output tently at light loads. This increases efficiency by minimiz- voltage, the duty cycle increases toward the maximum ing switching losses. During Burst Mode operation, the on-time. Further reduction of the supply voltage forces minimum peak inductor current is externally set by the the main switch to remain on for more than one cycle voltage on the SYNC/MODE pin and the voltage on the I eventually reaching 100% duty cycle. The output voltage TH pin is monitored by the burst comparator to determine will then be determined by the input voltage minus the when sleep mode is enabled and disabled. When the voltage drop across the internal P-channel MOSFET and average inductor current is greater than the load current, the inductor. the voltage on the ITH pin drops. As the ITH voltage falls
Low Supply Operation
below 150mV, the burst comparator trips and enables sleep mode. During sleep mode, the top power MOSFET The LTC3412A is designed to operate down to an input is held off and the ITH pin is disconnected from the output supply voltage of 2.25V. One important consideration at low of the error amplifier. The majority of the internal circuitry input supply voltages is that the RDS(ON) of the P-channel is also turned off to reduce the quiescent current to 64µA and N-channel power switches increases. The user should while the load current is solely supplied by the output calculate the power dissipation when the LTC3412A is used capacitor. When the output voltage drops, the ITH pin is at 100% duty cycle with low input voltages to ensure that reconnected to the output of the error amplifier and the thermal limits are not exceeded. top power MOSFET along with all the internal circuitry is switched back on. This process repeats at a rate that is dependent on the load demand. 3412aff Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .rco c m o / m L / T L C T 3 C 41 3 2 41 A 2 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts