Datasheet LTC3410 (Analog Devices) - 10

LTC3410
U U W U APPLICATIO S I FOR ATIO
where L1, L2, etc. are the individual losses as a percentage 2. I2R losses are calculated from the resistances of the of input power. internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing Although all dissipative elements in the circuit produce through inductor L is “chopped” between the main losses, two main sources usually account for most of the switch and the synchronous switch. Thus, the series losses in LTC3410 circuits: VIN quiescent current and I2R resistance looking into the SW pin is a function of both losses. The VIN quiescent current loss dominates the top and bottom MOSFET R efficiency loss at very low load currents whereas the I2R DS(ON) and the duty cycle (DC) as follows: loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) very low load currents can be misleading since the actual The R power lost is of no consequence as illustrated in Figure 3. DS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Charateristics 1. The VIN quiescent current is due to two components: curves. Thus, to obtain I2R losses, simply add RSW to the DC bias current as given in the electrical character- RL and multiply the result by the square of the average istics and the internal main switch and synchronous output current. switch gate charge currents. The gate charge current Other losses including C results from switching the gate capacitance of the IN and COUT ESR dissipative losses and inductor core losses generally account for less internal power MOSFET switches. Each time the gate is than 2% total additional loss. switched from high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting
Thermal Considerations
dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, In most applications the LTC3410 does not dissipate I much heat due to its high efficiency. But, in applications GATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom where the LTC3410 is running at high ambient switches. Both the DC bias and gate charge temperature with low supply voltage and high duty losses are proportional to V cycles, such as in dropout, the heat dissipated may IN and thus their effects will be more pronounced at higher supply voltages. exceed the maximum junction temperature of the part. If 1 VIN = 3.6V 0.1 0.01 0.001 POWER LOSS (W) 0.0001 VOUT = 3.3V VOUT = 1.8V VOUT = 1.2V 0.00001 0.1 1 10 100 1000 LOAD CURRENT (mA) 3410 F03
Figure 3. Power Loss vs Load Current
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