Datasheet LTC1707 (Analog Devices) - 6

LTC1707
U OPERATIO (Refer to Functional Diagram) Main Control Loop
When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 200mA, The LTC1707 uses a constant frequency, current mode even though the voltage at the I step-down architecture. Both the main (P-channel TH pin indicates a lower value. The voltage at the I MOSFET) and synchronous (N-channel MOSFET) switches TH pin drops when the inductor’s average current is greater than the load requirement. As are internal. During normal operation, the internal top the I power MOSFET is turned on each cycle when the oscillator TH voltage drops below 0.12V, the BURST comparator trips, causing the internal sleep line to go high and forcing sets the RS latch, and turned off when the current com- off both internal power MOSFETs. parator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by In sleep mode, both power MOSFETs are held off and the the voltage on the ITH pin, which is the output of error internal circuitry is partially turned off, reducing the quies- amplifier EA. The VFB pin, described in the Pin Functions cent current to 200µA. The load current is now being section, allows EA to receive an output feedback voltage supplied from the output capacitor. When the output from an external resistive divider. When the load current voltage drops, causing ITH to rise above 0.22V, the top increases, it causes a slight decrease in the feedback MOSFET is again turned on and this process repeats. voltage relative to the 0.8V reference, which, in turn, causes the I
Short-Circuit Protection
TH voltage to increase until the average induc- tor current matches the new load current. While the top When the output is shorted to ground, the frequency of the MOSFET is off, the bottom MOSFET is turned on until oscillator is reduced to about 35kHz, 1/10 the nominal either the inductor current starts to reverse as indicated by frequency. This frequency foldback ensures that the the current reversal comparator IRCMP, or the beginning of inductor current has more time to decay, thereby prevent- the next cycle. ing runaway. The oscillator’s frequency will progressively The main control loop is shut down by pulling the RUN/SS increase to 350kHz (or the synchronized frequency) when pin low. Releasing RUN/SS allows an internal 2.25µA VFB rises above 0.3V. current source to charge soft-start capacitor CSS. When C
Frequency Synchronization
SS reaches 0.7V, the main control loop is enabled with the ITH voltage clamped at approximately 5% of its maximum The LTC1707 can be synchronized with an external value. As CSS continues to charge, ITH is gradually TTL/CMOS compatible clock signal with an amplitude of at released, allowing normal operation to resume. least 2VP-P. The frequency range of this signal must be Comparator OVDET guards against transient overshoots from 385kHz to 550kHz. Do not attempt to synchronize the > 7.5% by turning the main switch off and keeping it off LTC1707 below 385kHz as this may cause abnormal until the fault is removed. operation and an undesired frequency spectrum. The top MOSFET turn-on follows the rising edge of the external
Burst Mode Operation
source. The LTC1707 is capable of Burst Mode operation in which When the LTC1707 is synchronized to an external source, the internal power MOSFETs operate intermittently based the LTC1707 operates in PWM pulse skipping mode. In on load demand. To enable Burst Mode operation, simply this mode, when the output load is very low, current allow the SYNC/MODE pin to float or connect it to a logic comparator ICOMP remains tripped for more than one cycle high. To disable Burst Mode operation and enable pulse and forces the main switch to stay off for the same number skipping mode, connect the SYNC/MODE pin to GND. In of cycles. Increasing the output load slightly allows con- this mode, efficiency is lower at light loads, but becomes stant frequency PWM operation to resume. This mode comparable to Burst Mode operation when the output load exhibits low output ripple as well as low audio noise and exceeds 30mA. reduced RF interference while providing reasonable low current efficiency. 6