Datasheet LT1767, LT1767-1.8, LT1767-2.5, LT1767-3.3, LT1767-5 (Analog Devices) - 6

LT1767/LT1767-1.8/ LT1767-2.5/LT1767-3.3/LT1767-5
pin FuncTions FB:
The feedback pin is used to set output voltage using and the GND pin short. The GND pin of the MS8 package an external voltage divider that generates 1.2V at the pin is directly attached to the internal tab. This pin should with the desired output voltage. The fixed voltage 1.8V, be attached to a large copper area to improve thermal 2.5V, 3.3V and 5V versions have the divider network in- resistance. The exposed pad of the MS8E package is also cluded internally and the FB pin is connected directly to connected to GND. This should be soldered to a large the output. If required, the current limit can be reduced copper area to improve its thermal resistance. during start up or short-circuit when the FB pin is below
V
0.5V (see the Current Limit Foldback graph in the Typical
SW:
The switch pin is the emitter of the on-chip power NPN switch. This pin is driven up to the input pin voltage Performance Characteristics section). An impedance of during switch on time. Inductor current drives the switch less than 5kΩ (adjustable part only) at the FB pin is needed pin negative during switch off time. Negative voltage must for this feature to operate. be clamped with an external catch diode with a VBR <0.8V.
BOOST:
The BOOST pin is used to provide a drive voltage,
SYNC:
The sync pin is used to synchronize the internal higher than the input voltage, to the internal bipolar NPN oscillator to an external signal. It is directly logic compat- power switch. Without this added voltage, the typical ible and can be driven with any signal between 20% and switch voltage loss would be about 1.5V. The additional 80% duty cycle. The synchronizing range is equal to initial boost voltage allows the switch to saturate and voltage operating frequency, up to 2MHz. See Synchronization in loss approximates that of a 0.22Ω FET structure. Applications Information section for details. When not in
VIN:
This is the collector of the on-chip power NPN switch. use, this pin should be grounded. This pin powers the internal circuitry and internal regu-
SHDN:
The shutdown pin is used to turn off the regulator and lator. At NPN switch on and off, high dI/dt edges occur to reduce input drain current to a few microamperes. The on this pin. Keep the external bypass capacitor and catch 1.33V threshold can function as an accurate undervoltage diode close to this pin. All trace inductance in this path lockout (UVLO), preventing the regulator from operating will create a voltage spike at switch off, adding to the VCE until the input voltage has reached a predetermined level. voltage across the internal NPN. Float or pull high to put the regulator in the operating mode.
GND:
The GND pin acts as the reference for the regulated
V
output, so load regulation will suffer if the “ground” end of
C:
The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally the load is not at the same voltage as the GND pin of the used for frequency compensation, but can do double duty IC. This condition will occur when load current or other as a current clamp or control loop override. This pin sits currents flow through metal paths between the GND pin at about 0.35V for very light loads and 0.9V at maximum and the load ground point. Keep the ground path short load. It can be driven to ground to shut off the output. between the GND pin and the load and use a ground plane when possible. Keep the path between the input bypass 1767fb 6 For more information www.linear.com/LT1767 Document Outline Description Typical Application Absolute Maximum Ratings Electrical Characteristics Typical Application