Datasheet LTC3774 (Analog Devices) - 10

LTC3774
OPERATION Main Control Loop
5mV steps with the ILIM pin. The filter time constant, The LTC3774 uses an LTC proprietary current sensing, R1C1, of the SNSD+ should match the L/DCR of the output current mode step-down architecture. During normal inductor, while the filter at SNSA+ should have a bandwidth operation, the top MOSFET is turned on every cycle when of five times larger than SNSD+, R2•C2 equals R1•C1/5. the oscillator sets the RS latch, and turned off when the
Internal Soft-Start
main current comparator, ICMP , resets the RS latch. The peak inductor current at which ICMP resets the RS latch By default, the start-up of the output voltage is normally is controlled by the voltage on the ITH pin, which is the controlled by an internal soft-start ramp. The internal soft- output of the error amplifier, EA. The remote sense amplifier start ramp represents a noninverting input to the error (diffamp) produces a signal equal to the differential voltage amplifier. The V + OSNS pin is regulated to the lower of the sensed across the output capacitor divided down by the error amplifier’s three noninverting inputs (the internal feedback divider and re-references it to the local IC ground soft-start ramp, the TK/SS pin or the internal 600mV ref- reference. The error amplifier receives this feedback signal erence). As the ramp voltage rises from 0V to 0.6V over and compares it to the internal 0.6V reference. When the approximately 600µs, the output voltage rises smoothly load current increases, it causes a slight decrease in the from its prebiased value to its final set value. V + OSNS pin voltage relative to the 0.6V reference, which in Certain applications can result in the start-up of the con- turn causes the ITH voltage to increase until the inductor’s verter into a non-zero load voltage, where residual charge average current equals the new load current. After the top is stored on the output capacitor at the onset of converter MOSFET has turned off, the bottom MOSFET is turned switching. In order to prevent the output from discharging on until either the inductor current starts to reverse, as under these conditions, the bottom MOSFET is disabled indicated by the reverse current comparator, IREV , or the until soft-start is greater than V + OSNS . beginning of the next cycle. The main control loop is shut down by pulling the RUN
Shutdown and Start-Up (RUN and TK/SS Pins)
pin low. Releasing RUN allows an internal 1.0µA current The LTC3774 can be shut down using the RUN pin. source to pull up the RUN pin. When the RUN pin reaches Pulling the RUN pin below 1.14V shuts down the main 1.22V, the main control loop is enabled and the IC is control loop for the controller and most internal circuits, powered up. When the RUN pin is low, all functions are including the INTVCC regulator. Releasing the RUN pin kept in a controlled state. allows an internal 1.0µA current to pull up the pin and enable the controller. Alternatively, the RUN pin may be
Sensing Signal of Very Low DCR
externally pulled up or driven directly by logic. Be careful The LTC3774 employs a unique architecture to enhance not to exceed the absolute maximum rating of 6V on this the signal-to-noise ratio that enables it to operate with a pin. The start-up of the controller’s output voltage, VOUT , small sense signal of a very low value inductor DCR, 1mΩ is controlled by the voltage on the TK/SS pin. When the or less, to improve power efficiency, and reduce jitter due voltage on the TK/SS pin is less than the 0.6V internal to the switching noise which could corrupt the signal. The reference, the LTC3774 regulates the V + OSNS voltage to LTC3774 can sense a DCR value as low as 0.2mΩ with the TK/SS pin voltage instead of the 0.6V reference. This careful PCB layout.The LTC3774 comprises two positive allows the TK/SS pin to be used to program a soft-start sense pins, SNSD+ and SNSA+, to acquire signals and by connecting an external capacitor from the TK/SS pin processes them internally to provide the response as with to GND. An internal 1.25µA pull-up current charges this a DCR sense signal that has a 14dB signal-to-noise ratio capacitor, creating a voltage ramp on the TK/SS pin. As improvement. In the meantime, the current limit threshold the TK/SS voltage rises linearly from 0V to 0.6V (and is still a function of the inductor peak current and its DCR beyond), the output voltage, VOUT , rises smoothly from value, and can be accurately set from 10mV to 30mV in zero to its final value. Alternatively, the TK/SS pin can be 3774fc 10 For more information www.linear.com/LTC3774 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts