Datasheet LTC3618 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Dual 4MHz, ±3A Synchronous Buck Converter for DDR Termination |
| 页数 / 页 | 24 / 9 — pin FuncTions (FE/UF) MODE/SYNC (Pin 24/Pin 3):. PGND (Exposed Pad Pin … |
| 文件格式/大小 | PDF / 633 Kb |
| 文件语言 | 英语 |
pin FuncTions (FE/UF) MODE/SYNC (Pin 24/Pin 3):. PGND (Exposed Pad Pin 25/ Exposed Pad Pin 25):. FuncTional block DiagraM
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文件文字版本
LTC3618
pin FuncTions (FE/UF) MODE/SYNC (Pin 24/Pin 3):
Mode Selection.
PGND (Exposed Pad Pin 25/ Exposed Pad Pin 25):
Power 1. Tying the MODE pin to SV Ground. The exposed pad connects to the sources of the IN or SGND enables pulse- skipping mode or forced continuous mode respectively power N-channel MOSFETs. The PGND pin is common for V for both channels. The exposed pad must be soldered DDQ only. The default operation mode for VTT is forced continuous mode. The input to the MODE/SYNC to the PCB for electrical connection and rated thermal pin should be a digital signal. performance. Refer to the Operation and Applications Information sections for more information. 2. When a clock signal is applied to this pin, the switching frequency synchronizes to this clock signal and forced continuous mode is selected for VDDQ.
FuncTional block DiagraM
ITH1 VDDQ PGOOD1 PGOOD WINDOW- DELAY COMPARATOR INTERNAL/ EXTERNAL COMPENSATION ERROR ITH-VOLTAGE FB1 AMPLIFIER LIMIT – V + REF + IDEAL DIODE PMOS CURRENT SENSE SLOPE PMOS – + – COMPENSATION CURRENT PVIN1 COMPARATOR MODE/SYNC CONTROLLER LOGIC TRACK/SS1 SW1 SOFT-START GATE DRIVER RUN1 CLK1 RUN2 OR PLL RT OSCILLATOR + NMOS AND PHASE CURRENT SENSE PHASE SELECTOR – 0A SVIN CLK2 UNDERVOLTAGE SGND LOCKOUT REVERSE OVERVOLTAGE SHUTDOWN CURRENT LOCKOUT COMPARATOR VDDQIN – R VTTR + R PGND DUPLICATE FOR V ERROR TT – PGOOD2 AMPLIFIER PVIN2 FB2 SW2 + ITH2 3618 FD 3618fc For more information www.linear.com/LTC3618 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions (FE/UF) MODE/SYNC (Pin 24/Pin 3):
Mode Selection.
PGND (Exposed Pad Pin 25/ Exposed Pad Pin 25):
Power 1. Tying the MODE pin to SV Ground. The exposed pad connects to the sources of the IN or SGND enables pulse- skipping mode or forced continuous mode respectively power N-channel MOSFETs. The PGND pin is common for V for both channels. The exposed pad must be soldered DDQ only. The default operation mode for VTT is forced continuous mode. The input to the MODE/SYNC to the PCB for electrical connection and rated thermal pin should be a digital signal. performance. Refer to the Operation and Applications Information sections for more information. 2. When a clock signal is applied to this pin, the switching frequency synchronizes to this clock signal and forced continuous mode is selected for VDDQ.
FuncTional block DiagraM
ITH1 VDDQ PGOOD1 PGOOD WINDOW- DELAY COMPARATOR INTERNAL/ EXTERNAL COMPENSATION ERROR ITH-VOLTAGE FB1 AMPLIFIER LIMIT – V + REF + IDEAL DIODE PMOS CURRENT SENSE SLOPE PMOS – + – COMPENSATION CURRENT PVIN1 COMPARATOR MODE/SYNC CONTROLLER LOGIC TRACK/SS1 SW1 SOFT-START GATE DRIVER RUN1 CLK1 RUN2 OR PLL RT OSCILLATOR + NMOS AND PHASE CURRENT SENSE PHASE SELECTOR – 0A SVIN CLK2 UNDERVOLTAGE SGND LOCKOUT REVERSE OVERVOLTAGE SHUTDOWN CURRENT LOCKOUT COMPARATOR VDDQIN – R VTTR + R PGND DUPLICATE FOR V ERROR TT – PGOOD2 AMPLIFIER PVIN2 FB2 SW2 + ITH2 3618 FD 3618fc For more information www.linear.com/LTC3618 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts