数据表Datasheet ADP1876 (Analog Devices)
Datasheet ADP1876 (Analog Devices)
制造商 | Analog Devices |
描述 | 600 kHz Dual Output Synchronous Buck PWM Controller Plus Linear Regulator |
页数 / 页 | 24 / 1 — 600 kHz Dual Output Synchronous Buck. PWM Controller with Linear … |
修订版 | B |
文件格式/大小 | PDF / 700 Kb |
文件语言 | 英语 |
600 kHz Dual Output Synchronous Buck. PWM Controller with Linear Regulator. Data Sheet. ADP1876. FEATURES
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600 kHz Dual Output Synchronous Buck PWM Controller with Linear Regulator Data Sheet ADP1876 FEATURES TYPICAL OPERATION CIRCUIT Wide input range: 2.75 V to 20 V VIN RRAMP1 Power stage input voltage: 1 V to 20 V Output voltage range: 0.6 V up to 90% VIN RAMP1 VIN Linear dropout (LDO) regulator with a fixed output ADP1876 1.5 V at 150 mA M1 EN1 DH1 L1 Output current more than 25 A per channel EN2 BST1 VDL VOUT1 180º phase shift between channels for reduced input SW1 R11 ILIM1 capacitance VCCO FB1 ±0.85% reference voltage accuracy from −40°C to +85°C TRK1 M2 DL1 R12 Integrated boost diodes PGOOD1 3V to 5V INPUT PGOOD2 RCSG1 Independent channel precision enable PGND1 VINLDO Overcurrent limit protection VOUTLDO RRAMP2 1.5V RAMP2 V Externally programmable soft start, slope compensation, IN NC and current sense gain M3 COMP1 DH2 L2 Thermal overload protection BST2 COMP2 V Input undervoltage lockout (UVLO) OUT2 SW2 R21 Power good with internal pull-up resistor ILIM2 FB2 Available in 32-lead, 5 mm × 5 mm LFCSP M4 SS1 DL2 R22 APPLICATIONS SS2 RCSG2 AGND PGND2
001
Consumer applications Telecommunications base station and networking
10103- Figure 1.
Industrial and instrumentation GENERAL DESCRIPTION
The ADP1876 is a dual output dc-to-dc synchronous buck sensing for enhanced noise immunity. The two PWM outputs controller operating at 600 kHz fixed frequency with integrated are phase shifted 180° for reducing the input current ripple and drivers that drive N-channel power MOSFETs. An additional the required input capacitance. fixed voltage output, 150 mA linear regulator is available for The ADP1876 provides high speed, high peak current drive powering low power loads. The device operates in current capability with dead time optimization to enable energy mode for improved transient response and uses valley current efficient power conversion.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2011-2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL OPERATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INDEPENDENT LOW DROPOUT LINEAR REGULATOR CONTROLLER ARCHITECTURE Synchronous Rectifier and Dead Time INPUT UNDERVOLTAGE LOCKOUT INTERNAL LINEAR REGULATOR (VCCO) OVERVOLTAGE PROTECTION POWER GOOD SHORT-CIRCUIT AND CURRENT-LIMIT PROTECTION SHUTDOWN CONTROL THERMAL OVERLOAD PROTECTION APPLICATIONS INFORMATION INDEPENDENT LOW DROPOUT LINEAR REGULATOR SETTING THE OUTPUT VOLTAGE OF THE CONTROLLER SOFT START SETTING THE CURRENT LIMIT ACCURATE CURRENT-LIMIT SENSING SETTING THE SLOPE COMPENSATION SETTING THE CURRENT SENSE GAIN INPUT CAPACITOR SELECTION INPUT FILTER BOOST CAPACITOR SELECTION INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION MOSFET SELECTION LOOP COMPENSATION SWITCHING NOISE AND OVERSHOOT REDUCTION PCB LAYOUT GUIDELINE TYPICAL APPLICATIONS CIRCUIT PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE