Datasheet LTC3855 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Dual, Multiphase Synchronous DC/DC Controller with Differential Remote Sense |
| 页数 / 页 | 44 / 10 — (FE38/UJ40). BOOST1, BOOST2 (Pin 32, Pin 24/Pin 29, Pin 21):. MODE/PLLIN … |
| 文件格式/大小 | PDF / 2.2 Mb |
| 文件语言 | 英语 |
(FE38/UJ40). BOOST1, BOOST2 (Pin 32, Pin 24/Pin 29, Pin 21):. MODE/PLLIN (Pin 37/Pin 34):
该数据表的模型线
文件文字版本
LTC3855 pin FuncTions
(FE38/UJ40) BOOST1, BOOST2 (Pin 32, Pin 24/Pin 29, Pin 21):
Boosted
MODE/PLLIN (Pin 37/Pin 34):
This is a dual purpose pin. Floating Driver Supplies. The (+) terminal of the bootstrap When external frequency synchronization is not used, capacitors connect to these pins. These pins swing from a this pin selects the operating mode. The pin can be tied diode voltage drop below INTVCC up to VIN + INTVCC. to SGND, tied to INTVCC or left floating. SGND enables
TG1, TG2 (Pin 33, Pin 23/Pin 30, Pin 20):
Top Gate forced continuous mode. INTVCC enables pulse-skipping Driver Outputs. These are the outputs of floating drivers mode. Floating enables Burst Mode operation. For external with a voltage swing equal to INTV sync, apply a clock signal to this pin. Both channels will CC superimposed on the switch nodes voltages. go into forced continuous mode and the internal PLL will synchronize the internal oscillator to the clock. The PLL
SW1, SW2 (Pin 34, Pin 22/Pin 31, Pin 19):
Switch Node compensation network is integrated into the IC. Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external) voltage drop below
FREQ (Pin 38/Pin 35):
There is a precision 10µA current ground to V flowing out of this pin. A resistor to ground sets a voltage IN. which in turn programs the frequency. Alternatively, this
PHASMD (Pin 36/Pin 33):
This pin can be tied to SGND, pin can be driven with a DC voltage to vary the frequency tied to INTVCC or left floating. This pin determines the of the internal oscillator. relative phases between the internal controllers as well as the phasing of the CLKOUT signal. See Table 1 in the
SGND (Exposed Pad Pin 39/ Pin 4, Exposed Pad Pin 41):
Operation section. Signal Ground. All small-signal components and com- pensation components should connect to this ground,
CLKOUT (Pin 35/Pin 32):
Clock output with phase change- which in turn connects to PGND at one point. Exposed able by PHASMD to enable usage of multiple LTC3855 in pad must be soldered to PCB, providing a local ground multiphase systems. for the control components of the IC, and be tied to the PGND pin under the IC. 3855f 0 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Related Parts
(FE38/UJ40) BOOST1, BOOST2 (Pin 32, Pin 24/Pin 29, Pin 21):
Boosted
MODE/PLLIN (Pin 37/Pin 34):
This is a dual purpose pin. Floating Driver Supplies. The (+) terminal of the bootstrap When external frequency synchronization is not used, capacitors connect to these pins. These pins swing from a this pin selects the operating mode. The pin can be tied diode voltage drop below INTVCC up to VIN + INTVCC. to SGND, tied to INTVCC or left floating. SGND enables
TG1, TG2 (Pin 33, Pin 23/Pin 30, Pin 20):
Top Gate forced continuous mode. INTVCC enables pulse-skipping Driver Outputs. These are the outputs of floating drivers mode. Floating enables Burst Mode operation. For external with a voltage swing equal to INTV sync, apply a clock signal to this pin. Both channels will CC superimposed on the switch nodes voltages. go into forced continuous mode and the internal PLL will synchronize the internal oscillator to the clock. The PLL
SW1, SW2 (Pin 34, Pin 22/Pin 31, Pin 19):
Switch Node compensation network is integrated into the IC. Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external) voltage drop below
FREQ (Pin 38/Pin 35):
There is a precision 10µA current ground to V flowing out of this pin. A resistor to ground sets a voltage IN. which in turn programs the frequency. Alternatively, this
PHASMD (Pin 36/Pin 33):
This pin can be tied to SGND, pin can be driven with a DC voltage to vary the frequency tied to INTVCC or left floating. This pin determines the of the internal oscillator. relative phases between the internal controllers as well as the phasing of the CLKOUT signal. See Table 1 in the
SGND (Exposed Pad Pin 39/ Pin 4, Exposed Pad Pin 41):
Operation section. Signal Ground. All small-signal components and com- pensation components should connect to this ground,
CLKOUT (Pin 35/Pin 32):
Clock output with phase change- which in turn connects to PGND at one point. Exposed able by PHASMD to enable usage of multiple LTC3855 in pad must be soldered to PCB, providing a local ground multiphase systems. for the control components of the IC, and be tied to the PGND pin under the IC. 3855f 0 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Related Parts