Datasheet LTC3865, LTC3865-1 (Analog Devices) - 9

LTC3865/LTC3865-1
PIN FUNCTIONS (QFN/TSSOP) VOSENSE1, VOSENSE2 (Pins 1, 8/Pins 5, 13):
When the
PGOOD1, PGOOD2 (Pins 14, 13 LTC3865-1/Pins 21, 20):
internal programmable resistive divider is used, these Separate Power Good Indicator Outputs for LTC3865-1 in pins must be connected to their corresponding outputs. QFN package and LTC3865 in FE package. Open-drain logic When an external resistive divider is used, these pins are output that is pulled to ground when the corresponding used for error amplifi er feedback inputs. They receive channel output exceeds ±10% regulation window, after the remotely sensed feedback voltages for each channel the internal 20μs power bad mask timer expires. directly from the outputs or from the external divider
PGND (Pin 18/NA):
Power Ground Pin. Connect this pin across the outputs. closely to the sources of the bottom N-channel MOSFETs,
TK/SS1, TK/SS2 (Pins 2, 7/Pins 6, 12):
Output Voltage the (–) terminal of CVCC and the (–) terminal of CIN. Tracking and Soft-Start Inputs. When one channel is
EXTV
confi gured to be master of the two channels, a capacitor
CC (Pin 20/Pin 28):
External Power Input to an Inter- nal Switch Connected to INTV to ground at this pin sets the ramp rate for the master CC. This switch closes and supplies the IC power, bypassing the internal low dropout channel’s output voltage. When a channel is confi gured regulator, whenever EXTV to be the slave of the two channels, the output voltage CC is higher than 4.7V. Do not exceed 6V on this pin. ramp of the master channel can be reproduced by a re- sistor divider and applied to this pin of the slave channel.
INTVCC (Pin 21/Pin 29):
Internal 5V Regulator Output. The Internal soft-start currents of 1.3μA charge the soft-start control circuits are powered from this voltage. Decouple capacitors. this pin to PGND with a minimum of 4.7μF low ESR tan- talum or ceramic capacitor.
ITH1, ITH2 (Pins 3, 6/Pins 7, 11):
Current Control Thresholds and Error Amplifi er Compensation Points. Each associated
VIN (Pin 22/Pin 30):
Main Input Supply. Decouple this pin channels’ current comparator tripping threshold increases to PGND with a capacitor (0.1μF to 1μF). with its ITH control voltage.
BG1, BG2 (Pins 23, 19/Pin 31, 27):
Bottom Gate Driver
VID11, VID12, VID21, VID22 (Pins 4, 5, 12, 28/ Pins 9,
Outputs. These pins drive the gates of the bottom N-chan-
10, 18, 37):
VID Inputs for Output Voltage Programming. nel MOSFETs between PGND and INTVCC. Tie these pins to INTVCC, GND or leave them fl oating to
BOOST1, BOOST2 (Pins 24, 17/Pins 33, 25):
Boosted set the output voltages. Floating Driver Supplies. The (+) terminal of the booststrap
I
capacitors connect to these pins. These pins swing from a
LIM (Pin 13/Pin 19) (LTC3865 Only):
Current Compara- tor Sense Voltage Range Inputs. This pin can be tied to diode voltage drop below INTVCC up to VIN + INTVCC. SGND, FLOAT or INTVCC to set the maximum current
TG1, TG2 (Pins 25, 16/Pins 34, 23):
Top Gate Driver sense threshold for each comparator. Current compara- Outputs. These are the outputs of fl oating drivers with tor sense voltage range of the LTC3865-1 is set to default a voltage swing equal to INTVCC superimposed on the value of 50mV. switch nodes voltages.
PGOOD (Pin 14 LTC3865/NA):
Co-Bonded Power Good
SW1, SW2 (Pins 26, 15/Pins 35, 22):
Switch Node Indicator Output for LTC3865 in QFN Package. Open-drain Connections to Inductors. Voltage swing at these pins logic output that is pulled to ground when either channel is from a Schottky diode (external) voltage drop below output exceeds ±10% regulation window, after the internal ground to VIN. 20μs power bad mask timer expires. 3865fb 9