Datasheet LT3742 (Analog Devices) - 6

LT3742
pin FuncTions G1, G2 (Pins 1, 6):
Gate Drives. These pins provide high
PG1, PG2 (Pins 17, 14):
Power Good. These pins are current gate drive for the external N-channel MOSFETs. open-collector outputs of internal comparators. PG remains These pins are the outputs of floating drivers whose volt- low until the FB pin is within 90% of the final regulation age swings between the BIAS and SW pins. voltage. As well as indicating output regulation, the PG
V
pins can be used to sequence the switching regulators.
IN (Pin 2):
Input Voltage. This pin supplies current to the internal circuitry of the LT3742. This pin must be locally The PG outputs are valid when VIN is greater than 4V bypassed with a capacitor. and either of the RUN/SS pins is high. The power good comparators are disabled in shutdown. If not used, these
UVLO (Pin 3):
Undervoltage Lockout. Do not leave this pins should be left unconnected. pin open ; connect it to VIN if not used. A resistor divider connected to V
V
IN is tied to this pin to program the mini-
C1, VC2 (Pins 18, 13):
Control Voltage and Compensation mum input voltage at which the LT3742 will operate. When Pins for Internal Error Amplifiers. Connect a series RC this pin is less than 1.25V, the controllers are disabled from these pins to ground to compensate each switching (the RUN/SS pins are still used to turn on each switching regulator loop. regulator). Once this pin drops below 1.25V, a 3µA current
FB1, FB2 (Pins 19, 12):
Feedback Pins. The LT3742 sink draws current into the pin to provide programmable regulates these pins to 800mV. Connect the feedback hysteresis for UVLO. resistors to this pin to set the output voltage for each
BIAS (Pin 4):
Bias for Gate Drive. This pin provides a bias switching regulator. voltage higher than the input voltage to drive the external
SENSE1–, SENSE2– (Pins 20, 11):
Negative Current Sense N-channel MOSFETs. The voltage on this pin is regulated Inputs. These pins (along with the SENSE+ pins) are used to to VIN + 7V. sense the inductor current for each switching regulator.
SWB (Pin 5):
Bias Regulator Switch. This is the collec-
SENSE1+, SENSE2+ (Pins 21, 10):
Positive Current Sense tor of an internal NPN switch used to generate the bias Inputs. These pins (along with the SENSE– pins) are used to voltage to provide gate drive for the external N-channel sense the inductor current for each switching regulator. MOSFETs.
SW1, SW2 (Pins 24, 7):
Switch Nodes. These pins connect
RUN/SS1, RUN/SS2 (Pins 16, 15):
Run/Soft-Start Pins. to the source of the external N-channel MOSFETs and to These pins are used to shut down each controller. They the external inductors and diodes. also provide a soft-start function with the addition of an
Exposed Pad (Pin 25):
Ground. The Exposed Pad of the external capacitor. To shut down any regulator, pull the package provides both electrical contact to ground and RUN/SS pin to ground with an open-drain or open-col- good thermal contact to the printed circuit board. The lector device. If neither feature is used, leave these pins Exposed Pad must be soldered to the circuit board to unconnected. ensure proper operation. 3742fa 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts