Datasheet LTC3773 (Analog Devices) - 10

制造商Analog Devices
描述Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking
页数 / 页32 / 10 — PIN FUNCTIONS (G/UHF). SENSE1+ (Pin 1/Pin 34):. ITH3 (Pin 9/Pin 6):. VFB2 …
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PIN FUNCTIONS (G/UHF). SENSE1+ (Pin 1/Pin 34):. ITH3 (Pin 9/Pin 6):. VFB2 (Pin 10/Pin 7):. VFB3 (Pin 11/Pin 8):

PIN FUNCTIONS (G/UHF) SENSE1+ (Pin 1/Pin 34): ITH3 (Pin 9/Pin 6): VFB2 (Pin 10/Pin 7): VFB3 (Pin 11/Pin 8):

该数据表的模型线

文件文字版本

LTC3773
PIN FUNCTIONS (G/UHF) SENSE1+ (Pin 1/Pin 34):
The (+) Input to the Channel 1
ITH3 (Pin 9/Pin 6):
Channel 3 Error Amplifi er Output and Differential Current Comparator. The ITH1 pin voltage and Switching Regulator Compensation Point. See ITH1. controlled offsets between the SENSE1– and SENSE1+
VFB2 (Pin 10/Pin 7):
Channel 2 Error Amplifi er Feedback pins in conjunction with RSENSE set the channel 1 current Input. See VFB1. trip threshold.
VFB3 (Pin 11/Pin 8):
Channel 3 Error Amplifi er Feedback
SENSE1– (Pin 2/Pin 35):
The (–) Input to the Channel 1 Input. See VFB1. Differential Current Comparator.
TRACK2 (Pin 12/Pin 9):
Channel 2 Tracking Input. Tie the
SDB/SDB1, SDB2, SDB3 (Pin 3/Pins 36, 37, 38):
Shut- TRACK2 pin to a resistive divider connected to the output down, Active Low. For G package, SDB1, SDB2 and SDB3 of channel 1 for either coincident or ratiometric output are shorted at the SDB pin. The power up thresholds for tracking. See the Soft-Start/Tracking application. TRACK2 channel 1, 2 and 3 are set at 1.2V, 1.8V and 2.4V respec- comes with a 1μA pull-up current. An external capacitor tively. By pulling the SDB1, SDB2 and SDB3 pins below can be added at this pin to provide soft-start. During 0.4V, the IC is put into low current shutdown mode (I startup or output short-circuit condition, if the potential VCCQ <30μA). There is a 0.5μA pull-up current at each SDB pin. at TRACK2 is less than 0.54V, current limit foldback is An external capacitor can be added at this pin to provide disabled. When channel 2 is powered down, this pin will power up delay. be pulled low.
TRACK1 (Pin 4/Pin 1):
Channel 1 Tracking Input. TRACK1
TRACK3 (Pin 13/Pin 10):
Channel 3 Tracking Input. See TRACK2. is used for tracking multiple LTC3773s. See the Startup Tracking application. To disable this feature, fl oat this pin
SENSE2– (Pin 14/Pin 11):
The (–) Input to the Channel 2 or tie it to VCC. TRACK1 provides a 1μA pull-up current. Differential Current Comparator. See SENSE1–. An external capacitor can be added at this pin to provide
SENSE2+ (Pin 15/Pin 12):
The (+) Input to the Channel 2 soft-start. During startup or output short-circuit condition, Differential Current Comparator. See SENSE1+. if the potential at TRACK1 is less than 0.54V, current limit foldback is disabled. When channel 1 is powered down,
SENSE3– (Pin 16/Pin 13):
The (–) Input to the Channel 3 Differential Current Comparator. See SENSE1–. this pin will be pulled low.
SENSE3+ (Pin 17/Pin 14):
The (+) Input to the Channel 3
VFB1 (Pin 5/Pin 2):
Channel 1 Error Amplifi er Feedback Differential Current Comparator. See SENSE1+. Input. This pin connects the error amplifi er input to an external resistive divider from V
V
OUT1.
CC (Pin 18/Pin 15):
Main Input Supply. All internal circuits except the output drivers are powered from this pin. V
I
CC
TH1 (Pin 6/Pin 3):
Channel 1 Error Amplifi er Output and should be connected to a low noise 5V power supply and Switching Regulator Compensation Point. The current should be bypassed to SGND with at least a 1μF capacitor comparator’s threshold increases with this control volt- in close proximity to the LTC3773. age.
PLLFLTR (Pin 19/Pin 16):
Phase-Locked Loop Lowpass
SGND (Pin 7/Pin 4):
Signal Ground. This pin must be Filter. The phase-locked loop’s lowpass fi lter is tied to this routed separately under the IC to the PGND pin and then pin. Alternatively, when external frequency synchronizing to the main ground plane. is not used, this pin can be forced low, left fl oating or tied
ITH2 (Pin 8/Pin 5):
Channel 2 Error Amplifi er Output and high to vary the frequency of the internal oscillator. Switching Regulator Compensation Point. See ITH1. 3773fb 10