Datasheet LTC3736-2 (Analog Devices) - 3

制造商Analog Devices
描述Dual 2-Phase, No RSENSE , Synchronous Controller with Output Tracking
页数 / 页28 / 3 — ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply …
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ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply over the full operating

ELECTRICAL CHARACTERISTICS The denotes the specifi cations which apply over the full operating

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LTC3736-2
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VIN = 4.2V unless otherwise specifi ed. PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loops
Input DC Supply Current (Note 4) Normal Mode RUN/SS = VIN 4.75 750 μA Shutdown RUN/SS = 0V 9 20 μA UVLO VIN = UVLO Threshold –200mV 3 10 μA Undervoltage Lockout Threshold VIN Falling l 1.95 2.25 2.55 V VIN Rising l 2.15 2.45 2.75 V Shutdown Threshold at RUN/SS 0.45 0.65 0.85 V Start-Up Current Source RUN/SS = 0V 0.4 0.7 1 μA Regulated Feedback Voltage 0°C to 85°C (Note 5) 0.594 0.6 0.606 V –40°C to 85°C l 0.591 0.6 0.609 V Output Voltage Line Regulation 2.75V < VIN < 9.8V (Note 5) 0.05 0.2 mV/ V Output Voltage Load Regulation ITH = 0.9V (Note 5) 0.12 0.5 % ITH = 1.7V –0.12 –0.5 % VFB1,2 Input Current (Note 5) 10 50 nA TRACK Input Current TRACK = 0.6V 10 50 nA Overvoltage Protect Threshold Measured at VFB 0.66 0.68 0.7 V Overvoltage Protect Hysteresis 20 mV Auxiliary Feedback Threshold SYNC/FCB Ramping Positive 0.525 0.6 0.675 V Top Gate (TG) Drive 1, 2 Rise Time CL = 3000pF 40 ns Top Gate (TG) Drive 1, 2 Fall Time CL = 3000pF 40 ns Bottom Gate (BG) Drive 1, 2 Rise Time CL = 3000pF 50 ns Bottom Gate (BG) Drive 1, 2 Fall Time CL = 3000pF 40 ns Maximum Current Sense Voltage (ΔVSENSE(MAX)) IPRG = Floating l 220 240 260 mV (SENSE+ – SW) IPRG = 0V l 150 167 185 mV IPRG = VIN l 320 345 370 mV Soft-Start Time Time for VFB1 to Ramp from 0.05V to 0.55V 0.667 0.833 1 ms
Oscillator and Phase-Locked Loop
Oscillator Frequency Unsynchronized (SYNC/FCB Not Clocked) PLLLPF = Floating 480 550 600 kHz PLLLPF = 0V 260 300 340 kHz PLLLPF = VIN 650 750 825 kHz Phase-Locked Loop Lock Range SYNC/FCB Clocked Minimum Synchronizable Frequency l 200 250 kHz Maximum Synchronizable Frequency l 850 1150 kHz Phase Detector Output Current Sinking fOSC > fSYNC/FCB –4 μA Sourcing fOSC < fSYNC/FCB 4 μA
PGOOD Output
PGOOD Voltage Low IPGOOD Sinking 1mA 125 mV PGOOD Trip Level VFB with Respect to Set Output Voltage VFB < 0.6V, Ramping Positive –13 –10 –7 % VFB < 0.6V, Ramping Negative –16 –13.3 –10 % VFB < 0.6V, Ramping Negative 7 10 13 % VFB < 0.6V, Ramping Positive 10 13.3 16 % 37362fb 3