LTC3736-1 UOPERATIO(Refer to Functional Diagram)Main Control Loop charged by the internal 0.7µA current source), the EAMP regulates the V The LTC3736-1 uses a current mode architecture with the FB1 proportionally linearly from 0V to 0.6V. two controllers operating 180 degrees out of phase. The start-up of VOUT2 is controlled by the voltage on the During normal operation, the top external P-channel power TRACK pin. When the voltage on the TRACK pin is less MOSFET is turned on when the clock for that channel sets than the 0.6V internal reference, the LTC3736-1 regulates the RS latch, and turned off when the current comparator the VFB2 voltage to the TRACK pin instead of the 0.6V (ICMP) resets the latch. The peak inductor current at which reference. Typically, a resistor divider on VOUT1 is con- ICMP resets the RS latch is determined by the voltage on nected to the TRACK pin to allow the start-up of VOUT2 to the ITH pin, which is driven by the output of the error “track” that of VOUT1. For one-to-one tracking during start- amplifier (EAMP). The VFB pin receives the output voltage up, the resistor divider would have the same ratio as the feedback signal from an external resistor divider. This divider on VOUT2 that is connected to VFB2. feedback signal is compared to the internal 0.6V reference voltage by the EAMP. When the load current increases, it Light Load Operation causes a slight decrease in VFB relative to the 0.6V refer- The LTC3736-1 operates in PWM pulse skipping mode at ence, which in turn causes the ITH voltage to increase until light loads. In this mode, the current comparator ICMP may the average inductor current matches the new load cur- remain tripped for several cycles and force the external P- rent. While the top P-channel MOSFET is off, the bottom channel MOSFET to stay off for the same number of cycles. N-channel MOSFET is turned on until either the inductor The inductor current is not allowed to reverse (discontinu- current starts to reverse, as indicated by the current ous operation). This mode exhibits low output ripple as reversal comparator, IRCMP, or the beginning of the next well as low audio noise and reduced RF interference, while cycle. providing high light load efficiency. Shutdown, Soft-Start and Tracking Start-UpSpread Spectrum Operation(RUN/SS and TRACK Pins) Switching regulators can be particularily troublesome in The LTC3736-1 is shut down by pulling the RUN/SS pin applications where electromagnetic interference (EMI) is low. In shutdown, all controller functions are disabled and a concern. Switching regulators operate on a cycle-by- the chip draws only 9µA. The TG outputs are held high (off) cycle basis to transfer power to an output. In most cases, and the BG outputs low (off) in shutdown. Releasing the frequency of operation is either fixed or is a constant RUN/SS allows an internal 0.7µA current source to charge based on the output load. This method of conversion up the RUN/SS pin. When the RUN/SS pin reaches 0.65V, creates large components of noise at the frequency of the LTC3736-1’s two controllers are enabled. operation (fundamental) and multiples of the operating The start-up of V frequency (harmonics). Figures 1a and 1b depict the OUT1 is controlled by the LTC3736-1’s internal soft-start. During soft-start, the error amplifier output noise spectrum of a conventional buck switching EAMP compares the feedback signal V converter (1/2 of LTC3736-1 with spread spectrum opera- FB1 to the internal soft-start ramp (instead of the 0.6V reference), which rises tion disabled) with VIN = 5V, VOUT = 2.5V and IOUT = 2A. linearly from 0V to 0.6V in about 1ms. This allows the Unlike conventional buck converters, the LTC3736-1’s output voltage to rise smoothly from 0V to its final value, internal oscillator is designed to produce a clock pulse while maintaining control of the inductor current. whose frequency is randomly varied between 450kHz and The 1ms soft-start time can be increased by connecting 580kHz. This has the benefit of spreading the switching the optional external soft-start capacitor C noise over a range of frequencies, thus significantly reduc- SS between the RUN/SS and SGND pins. As the RUN/SS pin continues to ing the peak noise. Figures 1c and 1d show the output rise linearly from approximately 0.65V to 1.3V (being noise spectrum of the LTC3736-1 (with spread spectrum 37361f 10