Datasheet LTC3737 (Analog Devices) - 8

LTC3737
U OPERATIO (Refer to Functional Diagram) Main Control Loop
than the 0.6V internal reference, the LTC3737 regulates the V The LTC3737 uses a constant frequency, current mode FB2 voltage to the TRACK pin instead of the 0.6V reference. Typically, a resistor divider on V architecture with the two controller channels operating OUT1 is con- nected to the TRACK pin to allow the start-up of V 180 degrees out of phase. During normal operation, each OUT2 to “track” that of V external P-channel power MOSFET is turned on when the OUT1. For one-to-one tracking during start- up, the resistor divider would have the same values as the clock for that channel sets the RS latch, and turned off divider on V when the current comparator (I OUT2 that is connected to VFB2. CMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is If no tracking function is desired, then the TRACK pin can determined by the voltage on the ITH pin, which is the be tied to VIN. Note, however, that in this situation, there output of each error amplifier (EAMP). The VFB pin re- would be no (internal or external) soft-start on VOUT2. ceives the output voltage feedback signal from an external resistor divider. This feedback signal is compared to the
Light Load Operation (Burst Mode Operation or Pulse
internal 0.6V reference voltage by the EAMP. When the
Skipping Mode) (SYNC/MODE Pin)
load current increases, it causes a slight decrease in VFB The LTC3737 can be enabled to enter high efficiency Burst relative to the 0.6V reference, which in turn, causes the ITH Mode operation at low load currents. To select Burst Mode voltage to increase until the average inductor current operation, tie the SYNC/MODE pin to a DC voltage above matches the new load current. 0.6V (e.g., VIN). To disable Burst Mode operation and enable PWM pulse skipping mode, connect SYNC/MODE
Shutdown, Soft-Start and Tracking Start-Up
to a DC voltage below 0.6V (e.g., SGND). In this mode, the
(RUN/SS and TRACK Pins)
efficiency is lower at light loads. However, pulse skipping The LTC3737 is shut down by pulling the RUN/SS pin low. mode has the advantages of lower output ripple and less In shutdown, all controller functions are disabled and the interference to audio circuitry. chip draws only 9µA. The PGATE outputs are held high When a controller is in Burst Mode operation, the peak (off) in shutdown. Releasing RUN/SS allows an internal current in the inductor is set to approximate one-fourth of 0.7µA current source to charge up the RUN/SS pin. When the maximum sense voltage even when the voltage on the the RUN/SS pin reaches 0.65V, the LTC3737’s two con- I trollers are enabled. TH pin indicates a lower value. If the average inductor current is greater than the load current, the EAMP will The start-up of VOUT1 is controlled by the LTC3737’s decrease the voltage on the ITH pin. When the ITH voltage internal soft-start. During soft-start, the error amplifier drops below 0.85V, the internal SLEEP signal goes high EAMP compares the feedback signal VFB1 to the internal and the external MOSFET is turned off. soft-start ramp (instead of the 0.6V reference), which rises In sleep mode, much of the internal circuitry is turned off, linearly from 0V to 0.6V in about 1ms. This allows the reducing the quiescent current that the LTC3737 draws. output voltage to rise smoothly from 0V to its final value, The load current is supplied by the output capacitor. As the while maintaining control of the inductor current. output voltage decreases, the EAMP increases the ITH The 1ms soft-start time can be increased by connecting voltage. When the ITH voltage reaches 0.925V, the SLEEP the optional external soft-start capacitor, CSS, between the signal goes low and the controller resumes normal opera- RUN/SS and SGND pins. As the RUN/SS pin continues to tion by turning on the external P-channel MOSFET on the rise linearly from approximately 0.65V to 1.3V (being next cycle of the internal oscillator. charged by the internal 0.7µA current source), the EAMP When the SYNC/MODE pin is clocked by an external clock regulates VFB1 linearly from 0V to 0.6V. source to use the phase-locked loop (see Frequency The start-up of VOUT2 is controlled by the voltage on the Selection and Phase-Locked Loop), the LTC3737 operates TRACK pin. When the voltage on the TRACK pin is less in PWM pulse skipping mode at light loads. 3737fa 8