Datasheet LTC1876 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | High Efficiency, 2-Phase, Dual Synchronous Step-Down Switching Controller and Step-Up Regulator |
| 页数 / 页 | 36 / 8 — TYPICAL PERFOR A CE CHARACTERISTICS. Input Source/Capacitor Instantaneous … |
| 文件格式/大小 | PDF / 372 Kb |
| 文件语言 | 英语 |
TYPICAL PERFOR A CE CHARACTERISTICS. Input Source/Capacitor Instantaneous Current (Figure 1). Load Step (Figure 1)
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文件文字版本
LTC1876
W U TYPICAL PERFOR A CE CHARACTERISTICS Input Source/Capacitor Instantaneous Current (Figure 1) Load Step (Figure 1) Load Step (Figure 1)
IIN 2A/DIV VOUT VOUT VIN 200mV/DIV 200mV/DIV 200mV/DIV VSW1 10V/DIV IOUT IOUT 2A/DIV 2A/DIV VSW2 10V/DIV 1876 G31 1876 G30 VIN = 15V 1µs/DIV V V IN = 15V IN = 15V 20µs/DIV VOUT = 5V V V OUT = 5V OUT = 5V IOUT5 = IOUT3.3 = 2A LOAD STEP = 0A TO 3A LOAD STEP = 0A TO 3A CONTINUOUS MODE Burst Mode OPERATION
Constant Frequency (Burst Burst Mode Operation (Figure 1) Inhibit) Operation (Figure 1)
VOUT VOUT 20mV/DIV 20mV/DIV IOUT IOUT 0.5A/DIV 0.5A/DIV 1876 G32 1876 G33 VIN = 15V 10µs/DIV VIN = 15V 2µs/DIV VOUT = 5V VOUT = 5V VFCB = OPEN VFCB = 5V IOUT = 20mA IOUT = 20mA
U U U PIN FUNCTIONS RUN/SS1, RUN/SS2 (Pins 1, 23):
Combination of Soft-Start,
SENSE1–, SENSE2– (Pins 3, 13):
The (–) Input to the Run Control Inputs and Short-Circuit Detection Timers. A Differential Current Comparators. capacitor to ground at each of these pins sets the ramp time
V
to full output current. Forcing either of these pins back below
OSENSE1, VOSENSE2 (Pins 4, 12):
Receives the remotely- sensed feedback voltage for each controller from an external 1V causes the IC to shut down the circuitry required for that resistive divider across the output. particular controller. Latchoff overcurrent protection is also invoked via this pin as described in the Applications Informa-
FREQSET (Pin 5):
Frequency Control Input to the Oscillator. tion section. This pin can be left open, tied to ground, tied to INTVCC or driven by an external voltage source. This pin can also be used
SENSE1+, SENSE2+ (Pins 2, 14):
The (+) Input to each with an external phase detector to build a true phase-locked Differential Current Comparator. The ITH pin voltage and loop. controlled offsets between the SENSE– and SENSE+ pins in conjunction with R
STBYMD (Pin 6):
Control pin that determines which circuitry SENSE set the current trip threshold. remains active when the controllers are shut down and/or 1876fa 8
W U TYPICAL PERFOR A CE CHARACTERISTICS Input Source/Capacitor Instantaneous Current (Figure 1) Load Step (Figure 1) Load Step (Figure 1)
IIN 2A/DIV VOUT VOUT VIN 200mV/DIV 200mV/DIV 200mV/DIV VSW1 10V/DIV IOUT IOUT 2A/DIV 2A/DIV VSW2 10V/DIV 1876 G31 1876 G30 VIN = 15V 1µs/DIV V V IN = 15V IN = 15V 20µs/DIV VOUT = 5V V V OUT = 5V OUT = 5V IOUT5 = IOUT3.3 = 2A LOAD STEP = 0A TO 3A LOAD STEP = 0A TO 3A CONTINUOUS MODE Burst Mode OPERATION
Constant Frequency (Burst Burst Mode Operation (Figure 1) Inhibit) Operation (Figure 1)
VOUT VOUT 20mV/DIV 20mV/DIV IOUT IOUT 0.5A/DIV 0.5A/DIV 1876 G32 1876 G33 VIN = 15V 10µs/DIV VIN = 15V 2µs/DIV VOUT = 5V VOUT = 5V VFCB = OPEN VFCB = 5V IOUT = 20mA IOUT = 20mA
U U U PIN FUNCTIONS RUN/SS1, RUN/SS2 (Pins 1, 23):
Combination of Soft-Start,
SENSE1–, SENSE2– (Pins 3, 13):
The (–) Input to the Run Control Inputs and Short-Circuit Detection Timers. A Differential Current Comparators. capacitor to ground at each of these pins sets the ramp time
V
to full output current. Forcing either of these pins back below
OSENSE1, VOSENSE2 (Pins 4, 12):
Receives the remotely- sensed feedback voltage for each controller from an external 1V causes the IC to shut down the circuitry required for that resistive divider across the output. particular controller. Latchoff overcurrent protection is also invoked via this pin as described in the Applications Informa-
FREQSET (Pin 5):
Frequency Control Input to the Oscillator. tion section. This pin can be left open, tied to ground, tied to INTVCC or driven by an external voltage source. This pin can also be used
SENSE1+, SENSE2+ (Pins 2, 14):
The (+) Input to each with an external phase detector to build a true phase-locked Differential Current Comparator. The ITH pin voltage and loop. controlled offsets between the SENSE– and SENSE+ pins in conjunction with R
STBYMD (Pin 6):
Control pin that determines which circuitry SENSE set the current trip threshold. remains active when the controllers are shut down and/or 1876fa 8