Datasheet LTM2889 (Analog Devices) - 6

制造商Analog Devices
描述Isolated CAN FD µModule Transceiver and Power
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SWITCHING. CHARACTERISTICS The. denotes specifications which apply over the full operating

SWITCHING CHARACTERISTICS The denotes specifications which apply over the full operating

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LTM2889
SWITCHING CHARACTERISTICS The
l
denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless otherwise noted, the following conditions apply: PVCC = VCC = 3.3V for the LTM2883-3, PVCC = VCC = 5V for the LTM2883-5, VL = 3.3V, GND = GND2 = S = RE = RS = 0V, ON = VL. Figure 2 applies with RL = 60Ω, CL = 100pF, RSL = 0Ω. Figure 10 applies for VCC2 = 3.3V; otherwise ADJ is floating. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Transceiver Timing
fMAX Maximum Data Rate l 4 Mbps tPTXBD TXD to Bus Dominant Propagation Delay (Figure 3) VCC2 = 3.3V l 55 105 165 ns VCC2 = 5V l 50 100 150 ns tPTXBR TXD to Bus Recessive Propagation Delay (Figure 3) VCC2 = 3.3V l 100 145 205 ns VCC2 = 5V l 80 115 155 ns tPTXBDS TXD to Bus Dominant Propagation Delay, RSL = 200k VCC2 = 3.3V l 200 565 1255 ns Slow Slew (Figure 3) VCC2 = 5V l 220 585 1225 ns tPTXBRS TXD to Bus Recessive Propagation Delay, Slow RSL = 200k VCC2 = 3.3V l 420 985 2035 ns Slew (Figure 3) VCC2 = 5V l 490 1065 2245 ns tPBDRX Bus Dominant to RXD Propagation Delay (Figure 3) l 40 65 100 ns tPBRRX Bus Recessive to RXD Propagation Delay (Figure 3) l 45 70 115 ns tPTXRXD TXD to RXD Dominant Propagation Delay (Figure 3) VCC2 = 3.3V l 120 170 240 ns VCC2 = 5V l 110 165 225 ns tPTXRXR TXD to RXD Recessive Propagation Delay (Figure 3) VCC2 = 3.3V l 160 215 275 ns VCC2 = 5V l 140 185 245 ns tPTXRXDS TXD to RXD Dominant Propagation Delay, RSL = 200k VCC2 = 3.3V l 210 550 1170 ns Slow Slew (Figure 3) VCC2 = 5V l 240 580 1150 ns tPTXRXRS TXD to RXD Recessive Propagation Delay, RSL = 200k VCC2 = 3.3V l 450 990 1960 ns Slow Slew (Figure 3) VCC2 = 5V l 500 1070 2150 ns tTOTXD TXD Timeout Time (Figure 4) l 0.5 2 4 ms tBIT(RXD),2M Receiver Output Recessive Bit Time, 2Mbps, (Figure 8) VCC2 = 3.3V l 400 455 550 ns Loop Delay Symmetry VCC2 = 5V l 400 475 550 ns tBIT(RXD),4M Receiver Output Recessive Bit Time, 4Mbps (Figure 8) VCC2 = 5V l 200 225 275 ns tZLR Receiver Output Enable Time (Figure 5) l 20 ns tLZR Receiver Output Disable Time (Figure 5) l 30 ns tENRSRX RXD Enable from Shutdown Time (Figure 6) l 40 µs tENRSTX TXD Enable from Shutdown TIme (Figure 7) (Note 5) l 40 µs tSHDNRX Time to Shutdown, Receiver (Figure 6) l 3 µs tSHDNTX Time to Shutdown, Transmitter (Figure 7) l 250 ns
Power Supply Generator
tENPS VCC2 Supply Start-Up Time No load, ON ↑, VCC2 to 4.5V l 2.3 5 ms
Transmitter Drive Symmetry (Common Mode Voltage Fluctuation)
VSYM Driver Symmetry (CANH + CANL – 2VO(R)) RL = 60Ω/Tol. < 1%, CSPLIT = 4.7nF/5%, l ±500 mV (Dynamic Peak Measurement) fTXD = 250kHz, Input Impedance of Oscilloscope: ≤ 20pF/≥1MΩ (Figure 2) 2889fa 6 For more information www.linear.com/LTM2889