Datasheet LTC2353-18 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Buffered Dual, 18-Bit, 550ksps/Ch Differential ±10.24V ADC with 30VP-P Common Mode Range |
| 页数 / 页 | 38 / 6 — POWER REQUIREMENTS The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 2.2 Mb |
| 文件语言 | 英语 |
POWER REQUIREMENTS The. denotes the specifications which apply over the full operating temperature
该数据表的模型线
文件文字版本
LTC2353-18
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IOVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled (CL = 25pF) l 1.6 2.7 mA Acquisition or Nap Mode l 1 20 μA Power Down Mode l 1 20 μA PD Power Dissipation 550ksps Sample Rate, 2 Channels Enabled l 162 195 mW Acquisition Mode l 153 193 mW Nap Mode l 34 47 mW Power Down Mode (C-Grade and I-Grade) l 0.60 2 mW Power Down Mode (H-Grade) l 0.60 4.3 mW
LVDS I/O Mode
OVDD Supply Voltage l 2.375 5.25 V IVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled l 14.4 16.1 mA 550ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 15) l 13.2 14.9 mA Acquisition Mode l 3.5 4.4 mA Nap Mode l 3.3 4.2 mA Power Down Mode (C-Grade and I-Grade) l 89 300 μA Power Down Mode (H-Grade) l 89 750 µA IOVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled (RL = 100Ω) l 7.4 8.6 mA Acquisition or Nap Mode (RL = 100Ω) l 7 8.2 mA Power Down Mode l 1 20 μA PD Power Dissipation 550ksps Sample Rate, 2 Channels Enabled l 187 221 mW Acquisition Mode l 179 223 mW Nap Mode l 60 76 mW Power Down Mode (C-Grade and I-Grade) l 0.60 2 mW Power Down Mode (H-Grade) l 0.60 4.3 mW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency 2 Channels Enabled l 550 ksps 1 Channel Enabled l 800 ksps tCYC Time Between Conversions 2 Channels Enabled, fSMPL = 550ksps l 1815 ns 1 Channel Enabled, fSMPL = 800ksps l 1250 ns tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 2 l 450•N 500•N 550•N ns tACQ Acquisition Time 2 Channels Enabled, fSMPL = 550ksps l 685 795 ns (tACQ = tCYC – tCONV – tBUSYLH) 1 Channel Enabled, fSMPL = 800ksps l 670 730 ns tCNVH CNV High Time l 40 ns tCNVL CNV Low Time l 750 ns tBUSYLH CNV to BUSY Delay CL = 25pF l 30 ns tQUIET Digital I/O Quiet Time from CNV l 20 ns tPDH PD High Time l 40 ns tPDL PD Low Time l 40 ns tWAKE REFBUF Wake-Up Time CREFBUF = 47μF, CREFIN = 0.1μF 200 ms 235318f 6 For more information www.linear.com/LTC2353-18 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS CONVERTER CHARACTERISTICS DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS REFERENCE BUFFER CHARACTERISTICS DIGITAL INPUTS AND DIGITAL OUTPUTS POWER REQUIREMENTS ADC TIMING CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS CONFIGURATION TABLES FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM APPLICATIONS INFORMATION BOARD LAYOUT PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IOVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled (CL = 25pF) l 1.6 2.7 mA Acquisition or Nap Mode l 1 20 μA Power Down Mode l 1 20 μA PD Power Dissipation 550ksps Sample Rate, 2 Channels Enabled l 162 195 mW Acquisition Mode l 153 193 mW Nap Mode l 34 47 mW Power Down Mode (C-Grade and I-Grade) l 0.60 2 mW Power Down Mode (H-Grade) l 0.60 4.3 mW
LVDS I/O Mode
OVDD Supply Voltage l 2.375 5.25 V IVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled l 14.4 16.1 mA 550ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 15) l 13.2 14.9 mA Acquisition Mode l 3.5 4.4 mA Nap Mode l 3.3 4.2 mA Power Down Mode (C-Grade and I-Grade) l 89 300 μA Power Down Mode (H-Grade) l 89 750 µA IOVDD Supply Current 550ksps Sample Rate, 2 Channels Enabled (RL = 100Ω) l 7.4 8.6 mA Acquisition or Nap Mode (RL = 100Ω) l 7 8.2 mA Power Down Mode l 1 20 μA PD Power Dissipation 550ksps Sample Rate, 2 Channels Enabled l 187 221 mW Acquisition Mode l 179 223 mW Nap Mode l 60 76 mW Power Down Mode (C-Grade and I-Grade) l 0.60 2 mW Power Down Mode (H-Grade) l 0.60 4.3 mW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency 2 Channels Enabled l 550 ksps 1 Channel Enabled l 800 ksps tCYC Time Between Conversions 2 Channels Enabled, fSMPL = 550ksps l 1815 ns 1 Channel Enabled, fSMPL = 800ksps l 1250 ns tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 2 l 450•N 500•N 550•N ns tACQ Acquisition Time 2 Channels Enabled, fSMPL = 550ksps l 685 795 ns (tACQ = tCYC – tCONV – tBUSYLH) 1 Channel Enabled, fSMPL = 800ksps l 670 730 ns tCNVH CNV High Time l 40 ns tCNVL CNV Low Time l 750 ns tBUSYLH CNV to BUSY Delay CL = 25pF l 30 ns tQUIET Digital I/O Quiet Time from CNV l 20 ns tPDH PD High Time l 40 ns tPDL PD Low Time l 40 ns tWAKE REFBUF Wake-Up Time CREFBUF = 47μF, CREFIN = 0.1μF 200 ms 235318f 6 For more information www.linear.com/LTC2353-18 Document Outline FEATURES APPLICATIONS DESCRIPTION TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS CONVERTER CHARACTERISTICS DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS REFERENCE BUFFER CHARACTERISTICS DIGITAL INPUTS AND DIGITAL OUTPUTS POWER REQUIREMENTS ADC TIMING CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS CONFIGURATION TABLES FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM APPLICATIONS INFORMATION BOARD LAYOUT PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS