Datasheet BCR601 (Infineon) - 7

BCR601 hot plug IC with voltage feedback to primary side Functional description
Vdrop / Vsense measurement ILED RDROP VC/D VDROP Vdrop VSENSE V I sense drop Rsense
Figure 6 VDROP versus VSENSE measurement
BCR601 incorporates two control loops:
1.
Fast LED current control loop In a proper design, the converter output voltage ripple will drop across the external power transistor (drain voltage VC/D) and “consumed” by the power transistor, so that the voltage across the LED string is constant. The LED current is sensed by the current sense resistor Rsense. The fast LED current control loop regulates the power transistor to keep the LED current constant. LED current is defined by the equation. ILED = Vsense/Rsense VC/D needs to be set high enough to make sure that BCR601 can regulate the power transistor to conduct a constant LED current. To enable adjustment of VC/D BCR601 has an integrated constant current sink Idrop at pin VDROP. By the external resistor RDROP the collector/drain voltage VC/D with respect to Vdrop is defined by the following equation. VC/D = Vdrop + Idrop ⋅ RDROP If VC/D is chosen too low, LED current will drop because either NPN hFE will drop too low and BCR601 IDRV reaches its maximum sourcing current, or NMOSFET drain to source resistance RDSon cannot be reduced further more as VDRV of BCR601 reaches its upper limit . As a result the output voltage ripple will modulate the LED current and flicker might become visible. If VC/D is chosen too high, power loss in the external power transistor will be high, resulting in low power efficiency and increased effort in heat dissipation of the power transistor.
2.
Slow control loop for the primary side output voltage In typical application, the primary side controller is integrated with active PFC function. The output voltage contains an unavoidable ripple of 100 Hz (at 50 Hz grid) or 120 Hz (at 60 Hz grid). The crossover frequency of the control loop must be much smaller than the ripple frequency, so that the ripple voltage is not regulated and the power factor is not deteriorated. This is realized by the RC compensation network (RPI, RDROP, CPI and CDROP) connected between OPTO pin and VDROP pin. Datasheet 7 Revision 1.1 2018-12-3 Document Outline Features Protection features Target applications Advantages with respect to discrete solutions Product validation Device information Description Table of contents 1 Pin configuration 2 Functional description 3 Thermal characteristics 4 Absolute maximum ratings 5 Operating conditions 6 Electrical characteristics 7 Package information 8 References Revision history Disclaimer