Datasheet Si8941/46/47 (Silicon Labs) - 5
| 制造商 | Silicon Labs |
| 描述 | Isolated Delta-Sigma Modulator for Current Shunt Measurement |
| 页数 / 页 | 35 / 5 — 2.1 Modulator. Figure 2.2. Typical 2nd Order Delta-Sigma Modulator Block … |
| 修订版 | 0.5 |
| 文件格式/大小 | PDF / 542 Kb |
| 文件语言 | 英语 |
2.1 Modulator. Figure 2.2. Typical 2nd Order Delta-Sigma Modulator Block Diagram. Table 2.1. Modulator Output
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文件文字版本
link to page 5 link to page 5 link to page 5 Si8941/46/47 Data Sheet System Overview
2.1 Modulator
The output of the Si8941/46/47 comes from a 2nd order delta-sigma modulator (Figure 2.2 Typical 2nd Order Delta-Sigma Modulator Block Diagram on page 5). The modulator provides 1-bit datastream whose average represents the input analog voltage. 0 V across the inputs is represented at the output by a pulse train that has 50% ones density. Positive specified full-scale at the input (e.g., +250 mV for the Si8941B/46B/47B and +62.5 mV for the Si8941A/46A/47A) produces an output datastream that has 89.06% ones density, and negative specified full scale gives an output that has 10.94% ones density. Table Table 2.1 Modulator Output on page 5 shows the values for other input levels and for both full-scale input options of the device. Ʃ ʃ Ʃ ʃ ʃ REF 1-Bit DAC
Figure 2.2. Typical 2nd Order Delta-Sigma Modulator Block Diagram Table 2.1. Modulator Output Differential Input Bitstream % Ones Si8941A/46A/47A Si8941B/46B/47B
+62.5 mV +250 mV 89.06% +31.25 mV +125 mV 69.53% 0 mV 0 mV 50% -31.25 mV -125 mV 30.47% -62.5 mV -250 mV 10.94%
silabs.com
| Building a more connected world. Preliminary Rev. 0.5 | 5 Document Outline 1. Ordering Guide 2. System Overview 2.1 Modulator 3. Current Sense Application 4. Electrical Specifications 4.1 Regulatory Information 4.2 Typical Operating Characteristics 5. Pin Descriptions 6. Packaging 6.1 Package Outline: 8-Pin Wide Body Stretched SOIC 6.2 Package Outline: 8-Pin Narrow Body SOIC 6.3 Land Pattern: 8-Pin Wide Body Stretched SOIC 6.4 Land Pattern: 8-Pin Narrow Body SOIC 6.5 Top Marking: 8-Pin Wide Body Stretched SOIC 6.6 Top Marking: 8-Pin Narrow Body SOIC 7. Revision History
2.1 Modulator
The output of the Si8941/46/47 comes from a 2nd order delta-sigma modulator (Figure 2.2 Typical 2nd Order Delta-Sigma Modulator Block Diagram on page 5). The modulator provides 1-bit datastream whose average represents the input analog voltage. 0 V across the inputs is represented at the output by a pulse train that has 50% ones density. Positive specified full-scale at the input (e.g., +250 mV for the Si8941B/46B/47B and +62.5 mV for the Si8941A/46A/47A) produces an output datastream that has 89.06% ones density, and negative specified full scale gives an output that has 10.94% ones density. Table Table 2.1 Modulator Output on page 5 shows the values for other input levels and for both full-scale input options of the device. Ʃ ʃ Ʃ ʃ ʃ REF 1-Bit DAC
Figure 2.2. Typical 2nd Order Delta-Sigma Modulator Block Diagram Table 2.1. Modulator Output Differential Input Bitstream % Ones Si8941A/46A/47A Si8941B/46B/47B
+62.5 mV +250 mV 89.06% +31.25 mV +125 mV 69.53% 0 mV 0 mV 50% -31.25 mV -125 mV 30.47% -62.5 mV -250 mV 10.94%
silabs.com
| Building a more connected world. Preliminary Rev. 0.5 | 5 Document Outline 1. Ordering Guide 2. System Overview 2.1 Modulator 3. Current Sense Application 4. Electrical Specifications 4.1 Regulatory Information 4.2 Typical Operating Characteristics 5. Pin Descriptions 6. Packaging 6.1 Package Outline: 8-Pin Wide Body Stretched SOIC 6.2 Package Outline: 8-Pin Narrow Body SOIC 6.3 Land Pattern: 8-Pin Wide Body Stretched SOIC 6.4 Land Pattern: 8-Pin Narrow Body SOIC 6.5 Top Marking: 8-Pin Wide Body Stretched SOIC 6.6 Top Marking: 8-Pin Narrow Body SOIC 7. Revision History