Datasheet HMC788A-EP (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 0.01 GHz to 10 GHz, MMIC, GaAs, pHEMT RF Gain Block |
| 页数 / 页 | 8 / 8 — HMC788A-EP. Enhanced Product. OUTLINE DIMENSIONS. 1.50 1.40. 2.05. 1.30. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 169 Kb |
| 文件语言 | 英语 |
HMC788A-EP. Enhanced Product. OUTLINE DIMENSIONS. 1.50 1.40. 2.05. 1.30. DETAIL A. 2.00 SQ. 0.65. (JEDEC 95). BSC. 1.95. PIN 1 INDEX. 0.90. AREA
文件文字版本
link to page 4
HMC788A-EP Enhanced Product OUTLINE DIMENSIONS 1.50 1.40 2.05 1.30 DETAIL A 2.00 SQ 0.65 (JEDEC 95) BSC 1.95 5 8 PIN 1 INDEX 0.90 AREA EXPOSED 0.80 PAD 0.70 P IN 1 IN D IC AT O R AR E A OP T IO N S 0.40 4 1 (SEE DETAIL A) TOP VIEW 0.35 BOTTOM VIEW 0.30 1.30 REF 0.90 0.85 SIDE VIEW 0.05 MAX FOR PROPER CONNECTION OF 0.80 THE EXPOSED PAD, REFER TO 0.02 NOM THE PIN CONFIGURATION AND COPLANARITY FUNCTION DESCRIPTIONS 0.08 0.30 SECTION OF THIS DATA SHEET. C 005352 SEATING PLANE 0.25 0.203 REF 2018- -004900/ G 0.20 17- K P 08-
Figure 14. 6-Lead Lead Frame Chip Scale Package [LFCSP] 2 mm × 2 mm Body and 0.85 mm Package Height (CP-6-10) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range MSL Rating2 Package Description Package Option
HMC788ACPSZ-EP-PT −55°C to +105°C MSL1 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-10 HMC788ACPSZ-EP-R7 −55°C to +105°C MSL1 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-10 1 Z = RoHS Compliant Part. 2 See the Absolute Maximum Ratings section.
©2017–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D16213-0-10/18(A)
Rev. A | Page 8 of 8 Document Outline Features Enhanced Product Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance Power Derating Curves ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Outline Dimensions Ordering Guide
HMC788A-EP Enhanced Product OUTLINE DIMENSIONS 1.50 1.40 2.05 1.30 DETAIL A 2.00 SQ 0.65 (JEDEC 95) BSC 1.95 5 8 PIN 1 INDEX 0.90 AREA EXPOSED 0.80 PAD 0.70 P IN 1 IN D IC AT O R AR E A OP T IO N S 0.40 4 1 (SEE DETAIL A) TOP VIEW 0.35 BOTTOM VIEW 0.30 1.30 REF 0.90 0.85 SIDE VIEW 0.05 MAX FOR PROPER CONNECTION OF 0.80 THE EXPOSED PAD, REFER TO 0.02 NOM THE PIN CONFIGURATION AND COPLANARITY FUNCTION DESCRIPTIONS 0.08 0.30 SECTION OF THIS DATA SHEET. C 005352 SEATING PLANE 0.25 0.203 REF 2018- -004900/ G 0.20 17- K P 08-
Figure 14. 6-Lead Lead Frame Chip Scale Package [LFCSP] 2 mm × 2 mm Body and 0.85 mm Package Height (CP-6-10) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range MSL Rating2 Package Description Package Option
HMC788ACPSZ-EP-PT −55°C to +105°C MSL1 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-10 HMC788ACPSZ-EP-R7 −55°C to +105°C MSL1 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-10 1 Z = RoHS Compliant Part. 2 See the Absolute Maximum Ratings section.
©2017–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D16213-0-10/18(A)
Rev. A | Page 8 of 8 Document Outline Features Enhanced Product Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance Power Derating Curves ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Outline Dimensions Ordering Guide