Datasheet UT69RH051 (Aeroflex) - 7
| 制造商 | Aeroflex |
| 描述 | Radiation-Hardened MicroController |
| 页数 / 页 | 20 / 7 — 3.0 RADIATION HARDNESS. RADIATION HARDNESS DESIGN SPECIFICATIONS. Note:. … |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
3.0 RADIATION HARDNESS. RADIATION HARDNESS DESIGN SPECIFICATIONS. Note:. 4.0 ABSOLUTE MAXIMUM RATINGS. SYMBOL. PARAMETER. LIMITS
该数据表的模型线
- 5962F9563801QQA 5962F9563801QQC 5962F9563801QQX 5962F9563801QYA 5962F9563801QYC 5962F9563801QYX 5962F9563801VQA 5962F9563801VQC 5962F9563801VQX 5962F9563801VYA 5962F9563801VYC 5962F9563801VYX 5962G9563801QQA 5962G9563801QQC 5962G9563801QQX 5962G9563801QYA 5962G9563801QYC 5962G9563801QYX 5962G9563801VQA 5962G9563801VQC 5962G9563801VQX 5962G9563801VYA 5962G9563801VYC 5962G9563801VYX 5962H9563801QQA 5962H9563801QQC 5962H9563801QQX 5962H9563801QYA 5962H9563801QYC 5962H9563801QYX 5962H9563801VQA 5962H9563801VQC 5962H9563801VQX 5962H9563801VYA 5962H9563801VYC 5962H9563801VYX 5962R9563801QQA 5962R9563801QQC 5962R9563801QQX 5962R9563801QYA 5962R9563801QYC 5962R9563801QYX 5962R9563801VQA 5962R9563801VQC 5962R9563801VQX 5962R9563801VYA 5962R9563801VYC 5962R9563801VYX UT69RH051P-CA UT69RH051P-CC UT69RH051P-CX UT69RH051W-PA UT69RH051W-PC UT69RH051W-PX
文件文字版本
3.0 RADIATION HARDNESS
circuit density and reliability. For transient radiation hardness and latchup immunity, UTMC builds all radiation-hardened The UT69RH051 incorporates special design and layout features products on epitaxial wafers using an advanced twin-tub CMOS which allow operation in high-level radiation environments. process. In addition, UTMC pays special attention to power and UTMC has developed special low-temperature processing ground distribution during the design phase, minimizing dose- techniques designed to enhance the total-dose radiation hardness rate upset caused by rail collapse. of both the gate oxide and the field oxide while maintaining the
RADIATION HARDNESS DESIGN SPECIFICATIONS
1 Total Dose 1.0E6 rad(Si) LET Threshold 20 MeV-cm2/mg Neutron Fluence 1.0E14 n/cm2 Saturated Cross-Section (1Kx8) 1E-4 cm2/device Single Event Upset 1.3E-7 errors/device-day2 Single Event Latchup1 LET>126 MeV-cm2/mg
Note:
1. Worst case temperature TA = +125°C. 2. Adams 90% worst case environment (geosynchronous).
4.0 ABSOLUTE MAXIMUM RATINGS
1 (Referenced to VSS)
SYMBOL PARAMETER LIMITS UNITS
VDD DC Supply Voltage -0.5 to 7.0 V VI/O Voltage on Any Pin -0.5 to VDD+0.3V V TSTG Storage Temperature -65 to +150 °C PD Maximum Power Dissipation 750 mW TJ Maximum Junction Temperature 175 °C ΘJC Thermal Resistance, Junction-to-Case 2 10 °C/W II DC Input Current ±10 mA
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Test per MIL-STD-883, Method 1012. 7
circuit density and reliability. For transient radiation hardness and latchup immunity, UTMC builds all radiation-hardened The UT69RH051 incorporates special design and layout features products on epitaxial wafers using an advanced twin-tub CMOS which allow operation in high-level radiation environments. process. In addition, UTMC pays special attention to power and UTMC has developed special low-temperature processing ground distribution during the design phase, minimizing dose- techniques designed to enhance the total-dose radiation hardness rate upset caused by rail collapse. of both the gate oxide and the field oxide while maintaining the
RADIATION HARDNESS DESIGN SPECIFICATIONS
1 Total Dose 1.0E6 rad(Si) LET Threshold 20 MeV-cm2/mg Neutron Fluence 1.0E14 n/cm2 Saturated Cross-Section (1Kx8) 1E-4 cm2/device Single Event Upset 1.3E-7 errors/device-day2 Single Event Latchup1 LET>126 MeV-cm2/mg
Note:
1. Worst case temperature TA = +125°C. 2. Adams 90% worst case environment (geosynchronous).
4.0 ABSOLUTE MAXIMUM RATINGS
1 (Referenced to VSS)
SYMBOL PARAMETER LIMITS UNITS
VDD DC Supply Voltage -0.5 to 7.0 V VI/O Voltage on Any Pin -0.5 to VDD+0.3V V TSTG Storage Temperature -65 to +150 °C PD Maximum Power Dissipation 750 mW TJ Maximum Junction Temperature 175 °C ΘJC Thermal Resistance, Junction-to-Case 2 10 °C/W II DC Input Current ±10 mA
Notes:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Test per MIL-STD-883, Method 1012. 7