Datasheet S2D13V70 Golden Gate (Epson)
| 制造商 | Epson |
| 描述 | Automotive Grade Bridge IC (eDP to Open LDI) |
| 页数 / 页 | 2 / 1 — S2D13V70 Golden Gate. Automotive Grade. Bridge IC(eDP to Open LDI). … |
| 文件格式/大小 | PDF / 133 Kb |
| 文件语言 | 英语 |
S2D13V70 Golden Gate. Automotive Grade. Bridge IC(eDP to Open LDI). Descriptions. Highlights (Features). Other Features
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S2D13V70 Golden Gate Automotive Grade Bridge IC(eDP to Open LDI)
Descriptions
Golden Gate is an eDP(rev.1.4a) to Open LDI bridge device which can realize the connectivity between the eDP source to the display panel with the Open LDI interface. It can receive the data rate of 1.62Gbps/2.7Gbps with 1 lane/2lane eDP and convert it to transport with 2ch Open LDI signaling with the pixel clock frequency up to 154MHz (per 1ch). The specification is simple enough so that it can be easily inserted into existing system display architectures with minimal modifications required, making it an ideal solution for both existing and future designs. Golden Gate is also qualified for automotive design including AEC-Q100 certification and several functional safety features.
Highlights (Features)
Simple Bridge chip (eDP to Open LDI) with Automotive grade design AEC-Q100 certified Functional safety features *Input resolution size monitoring *Input pixel clock monitoring *Input Video data CRC *Register setting CRC *Watermark function
Other Features
Power Supply : 1.8V/3.3V (Dual Supply) Host interface : SPI Display Interface (input) : eDP (rev.1.4a) x 1 or 2 lanes Display Interface (output) : Open LDI x 1 or 2ch Display resolution : Max FHD (1920x1200x60fps) Image Correction : 8bit digital Gamma LUT + 2bit Dithering Package Type : PFBGA8-81 （Body size = 8mm x 8mm x 1.2mm、Ball Pitch= 0.8mm） Document Outline (Descriptions (Highlights (Features) (Other Features (System Block Diagram
Descriptions
Golden Gate is an eDP(rev.1.4a) to Open LDI bridge device which can realize the connectivity between the eDP source to the display panel with the Open LDI interface. It can receive the data rate of 1.62Gbps/2.7Gbps with 1 lane/2lane eDP and convert it to transport with 2ch Open LDI signaling with the pixel clock frequency up to 154MHz (per 1ch). The specification is simple enough so that it can be easily inserted into existing system display architectures with minimal modifications required, making it an ideal solution for both existing and future designs. Golden Gate is also qualified for automotive design including AEC-Q100 certification and several functional safety features.
Highlights (Features)
Simple Bridge chip (eDP to Open LDI) with Automotive grade design AEC-Q100 certified Functional safety features *Input resolution size monitoring *Input pixel clock monitoring *Input Video data CRC *Register setting CRC *Watermark function
Other Features
Power Supply : 1.8V/3.3V (Dual Supply) Host interface : SPI Display Interface (input) : eDP (rev.1.4a) x 1 or 2 lanes Display Interface (output) : Open LDI x 1 or 2ch Display resolution : Max FHD (1920x1200x60fps) Image Correction : 8bit digital Gamma LUT + 2bit Dithering Package Type : PFBGA8-81 （Body size = 8mm x 8mm x 1.2mm、Ball Pitch= 0.8mm） Document Outline (Descriptions (Highlights (Features) (Other Features (System Block Diagram