Datasheet XF (IDT) - 10
| 制造商 | IDT |
| 描述 | 150fs Small Package Quartz-based PLL Oscillator |
| 页数 / 页 | 17 / 10 — Output Waveforms Figure 1. LVDS Output Waveforms. Output Levels /Rise … |
| 修订版 | 20190403 |
| 文件格式/大小 | PDF / 385 Kb |
| 文件语言 | 英语 |
Output Waveforms Figure 1. LVDS Output Waveforms. Output Levels /Rise Time/Fal Time Measurements. Oscillator Symmetry
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XF Datasheet
Output Waveforms Figure 1. LVDS Output Waveforms Output Levels /Rise Time/Fal Time Measurements
TR TF OUT0b 20% to 80% VOS VOD OUT0
Oscillator Symmetry
OUT0b VOH OUT0 VOL ½ Period Period
Figure 2. LVPECL Output Waveforms Rise Time/Fall Time Measurements
TR TF OUT0b VOH 20% to 80% OUT0 VOL
Oscillator Symmetry
OUT0b VOH OUT0 VOL ½ Period Period ©2019 Integrated Device Technology, Inc. 10 April 3, 2019 Document Outline Description Pin Assignments Features Typical Applications Table 1. Pin Descriptions Absolute Maximum Ratings Table 2. Absolute Maximum Ratings ESD Compliance Table 3. ESD Compliance Mechanical Testing Table 4. Mechanical Testing * Solder Reflow Profile DC Electrical Characteristics Table 5. 3.3V IDD DC Electrical Characteristics Table 6. 2.5V IDD DC Electrical Characteristics Table 7. 1.8V IDD DC Electrical Characteristics Table 8. LVCMOS DC Electrical Characteristics Table 9. LVDS DC Electrical Characteristics Table 10. LVPECL DC Electrical Characteristics Table 11. HCSL DC Electrical Characteristics Table 12. CML DC Electrical Characteristics Table 13. DC Electrical Characteristics – Leakage Current AC Electrical Characteristics Table 14. 3.3V AC Electrical Characteristics Table 15. 2.5V AC Electrical Characteristics Table 16. 1.8V AC Electrical Characteristics Table 17. Phase Jitter Characteristics Output Waveforms Figure 1. LVDS Output Waveforms Figure 2. LVPECL Output Waveforms Figure 3. HCSL Output Waveforms Figure 4. CML Output Waveforms Termination for 3.3V LVPECL Outputs Figure 5. 3.3V LVPECL Output Termination Figure 6. 3.3V LVPECL Output Termination Termination for 2.5V LVPECL Outputs Figure 7. 2.5V LVPECL Driver Termination Example Figure 8. 2.5V LVPECL Driver Termination Example Figure 9. 2.5V LVPECL Driver Termination Example LVDS Driver Termination Figure 10. Standard LVDS Termination Figure 11. Optional LVDS Termination Recommended Termination for HCSL Outputs Figure 12. Recommended Source Termination (where the driver and receiver will be on separate PCBs) Figure 13. Recommended Termination (where a point-to-point connection can be used) CML Termination Figure 14. CML Termination Example Package Outline Drawings Marking Diagram Ordering Information Revision History
Output Waveforms Figure 1. LVDS Output Waveforms Output Levels /Rise Time/Fal Time Measurements
TR TF OUT0b 20% to 80% VOS VOD OUT0
Oscillator Symmetry
OUT0b VOH OUT0 VOL ½ Period Period
Figure 2. LVPECL Output Waveforms Rise Time/Fall Time Measurements
TR TF OUT0b VOH 20% to 80% OUT0 VOL
Oscillator Symmetry
OUT0b VOH OUT0 VOL ½ Period Period ©2019 Integrated Device Technology, Inc. 10 April 3, 2019 Document Outline Description Pin Assignments Features Typical Applications Table 1. Pin Descriptions Absolute Maximum Ratings Table 2. Absolute Maximum Ratings ESD Compliance Table 3. ESD Compliance Mechanical Testing Table 4. Mechanical Testing * Solder Reflow Profile DC Electrical Characteristics Table 5. 3.3V IDD DC Electrical Characteristics Table 6. 2.5V IDD DC Electrical Characteristics Table 7. 1.8V IDD DC Electrical Characteristics Table 8. LVCMOS DC Electrical Characteristics Table 9. LVDS DC Electrical Characteristics Table 10. LVPECL DC Electrical Characteristics Table 11. HCSL DC Electrical Characteristics Table 12. CML DC Electrical Characteristics Table 13. DC Electrical Characteristics – Leakage Current AC Electrical Characteristics Table 14. 3.3V AC Electrical Characteristics Table 15. 2.5V AC Electrical Characteristics Table 16. 1.8V AC Electrical Characteristics Table 17. Phase Jitter Characteristics Output Waveforms Figure 1. LVDS Output Waveforms Figure 2. LVPECL Output Waveforms Figure 3. HCSL Output Waveforms Figure 4. CML Output Waveforms Termination for 3.3V LVPECL Outputs Figure 5. 3.3V LVPECL Output Termination Figure 6. 3.3V LVPECL Output Termination Termination for 2.5V LVPECL Outputs Figure 7. 2.5V LVPECL Driver Termination Example Figure 8. 2.5V LVPECL Driver Termination Example Figure 9. 2.5V LVPECL Driver Termination Example LVDS Driver Termination Figure 10. Standard LVDS Termination Figure 11. Optional LVDS Termination Recommended Termination for HCSL Outputs Figure 12. Recommended Source Termination (where the driver and receiver will be on separate PCBs) Figure 13. Recommended Termination (where a point-to-point connection can be used) CML Termination Figure 14. CML Termination Example Package Outline Drawings Marking Diagram Ordering Information Revision History