Datasheet A80601, A80601-1 (Allegro) - 5

A80601 and High Power LED Driver with Pre-Emptive Boost A80601-1 for Ultra-High Dimming Ratio and Low Output Ripple PINOUT DIAGRAM AND TERMINAL LIST VIN VSENSE GATE GDRV CS VDRV 24 23 22 21 20 19 FAULT 1 18 PGND VDD 2 17 OVP AGND 3 16 LED1 PAD COMP 4 15 LED2 ISET 5 14 LED3 PEB 6 13 LED4 7 8 9 10 11 12 EN DITH FSET ADIM PWM CLKOUT Package ES, 24-Pin QFN Pinouts Terminal List Table Number Name Function
1 FAULT This pin is an open drain type configuration that will be pulled low when a fault occurs. Connect a pull-up resistor between this pin and desired logic level voltage. 2 VDD Output of internal LDO (bias regulator). Connect a 1 µF decoupling capacitor between this pin and AGND. VDD is regulated at ~4.25 V. 3 AGND LED current Ground. Also serves as ‘quiet’ ground for analog signals. 4 COMP Output of the error amplifier and compensation node. Connect a series RZ-CZ network from this pin to AGND for control loop compensation. 5 ISET Connect RISET resistor between this pin and AGND to set the 100% LED current. 6 PEB Pre-Emptive Boost control: Connect resistor from PEB pin to AGND to fine-tune the delay between boost switch and LED current sinks. Leave pin open for minimum PEB delay of 1 μs. 7 DITH Dithering control: connect a capacitor to AGND to set the dithering modulation frequency (1 to 22 kHz). Connect a resistor between DITH and FSET pins to set the dithering range (such as ±5% of fSW). Frequency/Synchronization pin. A resistor RFSET from this pin to AGND sets the switching frequency fSW (with dithering superimposed) 8 FSET between 200 kHz and 2.3 MHz. It can also be used to synchronize fSW to an external frequency between 260 kHz and 2.3 MHz (frequency dithering is disabled in this case). 9 ADIM Analog dimming. Apply a PWM clock (40 to 1000 kHz) to pin and the duty cycle of this clock determines the LED current. Alternatively, apply DC level between 0.2 and 2 V to vary LED current between 10% and 100%. If unused, pull pin above 2 V for 100%. 10 PWM Controls the on/off state of LED current sinks to reduce the light intensity by using pulse-width modulation. Typical PWM dimming frequency is in the range of 200 Hz to 2 kHz. EN and PWM pins may be tied together to allow single-wire dimming control. 11 EN Enables the IC when this pin is pulled high. If EN goes low, the IC remains in standby mode for up to 16 ms, then shuts down completely. 12 CLKOUT Logic output representing the switching frequency of internal boost oscillator. This allows other converters to be synchronized to the same fSW with the same dithering modulation, if applicable. Output is active as long as IC is enabled. 13-16 LED4..LED1 LED current sinks #4 to #1. Connect the cathode of each LED string to pin. Unused LED pin must be terminated to AGND through a 2.37 kΩ resistor. 17 OVP Overvoltage Protection. Connect external resistor from VOUT to this pin to adjust the overvoltage protection threshold. 18 PGND Power Ground for internal Gate Driver. Connect pin to external power GND with shortest path. 19 VDRV Gate driver supply voltage (~6.5 V). Connect a 2.2 µF MLCC to PGND for buffer. 20 CS Current Sense for peak current control of power switch. Connect to sense resistor at the Source terminal of external power MOSFET. 21 GDRV Gate driver for power switch. Connect to Gate of external power MOSFET. (External FET must be fully enhanced at VGS = 5 V). 22 GATE Output gate driver pin for external P-channel MOSFET (input disconnect switch). 23 VSENSE Connect this pin to the negative sense side of the input current sense resistor RSC. The threshold voltage is measured as VIN – VSENSE. There is also fixed iADJ current sink to allow for trip threshold adjustment. 24 VIN Input power to the IC as well as the positive side of input current sense resistor. – PAD Exposed pad of the package providing enhanced thermal dissipation. Must be connected to the ground plane(s) of the PCB with at least 8 vias, directly in the pad. Allegro MicroSystems, LLC 5 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming ADIM Mode APWM Mode Extending LED Dimming Ratio Analog Dimming with External Voltage VDD VDRV Shutdown Fault Detection and Protection FAULT Status LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Input Current Sense Resistor Input UVLO Fault Protection During Operation Package Outline Drawing Appendix: External MOSFET Selection Guide