Datasheet ADuM4121/ADuM4121-1 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | High Voltage, Isolated Gate Driver with Internal Miller Clamp, 2 A Output |
| 页数 / 页 | 16 / 9 — Data Sheet. ADuM4121/ADuM4121-1. VDD1 = 5.0V. tDHL. VDD1 = 3.3V. tDLH. (n … |
| 文件格式/大小 | PDF / 535 Kb |
| 文件语言 | 英语 |
Data Sheet. ADuM4121/ADuM4121-1. VDD1 = 5.0V. tDHL. VDD1 = 3.3V. tDLH. (n Y. N DE. I DD1. A AG P. O R P. 100. 2.5. 3.0. 3.5. 4.0. 4.5. 5.0. 5.5
该数据表的模型线
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Data Sheet ADuM4121/ADuM4121-1 60 7 VDD1 = 5.0V tDHL VDD1 = 3.3V tDLH 6 50 s) 5 (n Y 40 A ) L A 4 (m N DE 30 IO I DD1 T 3 A AG P 20 2 O R P 1 10 0 0 0 20 40 60 80 100
107
2.5 3.0 3.5 4.0 4.5 5.0 5.5
108 67-
DUTY CYCLE (%)
7- 149
VDD1 (V)
1496 Figure 10. IDD1 vs. Duty Cycle, fSW = 10 kHz, 2 nF Load Figure 13. Propagation Delay vs. VDD1, VDD2 = 15 V, 2 nF Load, 0 Ω Gate Resistor
3.0 60 V t DD1 = 5.0V DHL V t DD1 = 3.3V DLH 2.5 50 s) (n 2.0 Y 40 A L A) E D (m 1.5 N 30 IO I DD1 AT 1.0 AG P 20 O R P 0.5 10 0 0 0 50 100 150 200 250 300 350 400 450 500
109
–40 –20 0 20 40 60 80 100 120
11 1 67- 67-
FREQUENCY (kHz)
149
TEMPERATURE (°C)
149 Figure 11. IDD1 vs. Frequency Figure 14. Propagation Delay vs. Temperature, 2 nF Load
5.0 60 V t DD2 = 15V DHL 4.5 VDD2 = 10V tDLH VDD2 = 5V 50 4.0 s) 3.5 (n Y 40 A 3.0 L A) E (m 2.5 N D 30 IO T I DD2 2.0 A AG P 20 1.5 O R P 1.0 10 0.5 0
0
0 0 50 100 150 200 250 300 350 400 450 500
1 1
5 10 15 20 25 30 35
14 1 67- 7-
FREQUENCY (kHz)
149
VDD2 (V)
1496 Figure 12. IDD2 vs. Frequency with 2 nF Load Figure 15. Propagation Delay vs. VDD2, 2 nF Load Rev. 0 | Page 9 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS REGULATORY INFORMATION PACKAGE CHARACTERISTICS INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD (PCB) LAYOUT VI+ and VI− Operation PROPAGATION DELAY-RELATED PARAMETERS UNDERVOLTAGE LOCKOUT (UVLO) OUTPUT LOAD CHARACTERISTICS Miller Clamp POWER DISSIPATION INSULATION LIFETIME TYPICAL APPLICATIONS OUTLINE DIMENSIONS ORDERING GUIDE
107
2.5 3.0 3.5 4.0 4.5 5.0 5.5
108 67-
DUTY CYCLE (%)
7- 149
VDD1 (V)
1496 Figure 10. IDD1 vs. Duty Cycle, fSW = 10 kHz, 2 nF Load Figure 13. Propagation Delay vs. VDD1, VDD2 = 15 V, 2 nF Load, 0 Ω Gate Resistor
3.0 60 V t DD1 = 5.0V DHL V t DD1 = 3.3V DLH 2.5 50 s) (n 2.0 Y 40 A L A) E D (m 1.5 N 30 IO I DD1 AT 1.0 AG P 20 O R P 0.5 10 0 0 0 50 100 150 200 250 300 350 400 450 500
109
–40 –20 0 20 40 60 80 100 120
11 1 67- 67-
FREQUENCY (kHz)
149
TEMPERATURE (°C)
149 Figure 11. IDD1 vs. Frequency Figure 14. Propagation Delay vs. Temperature, 2 nF Load
5.0 60 V t DD2 = 15V DHL 4.5 VDD2 = 10V tDLH VDD2 = 5V 50 4.0 s) 3.5 (n Y 40 A 3.0 L A) E (m 2.5 N D 30 IO T I DD2 2.0 A AG P 20 1.5 O R P 1.0 10 0.5 0
0
0 0 50 100 150 200 250 300 350 400 450 500
1 1
5 10 15 20 25 30 35
14 1 67- 7-
FREQUENCY (kHz)
149
VDD2 (V)
1496 Figure 12. IDD2 vs. Frequency with 2 nF Load Figure 15. Propagation Delay vs. VDD2, 2 nF Load Rev. 0 | Page 9 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS REGULATORY INFORMATION PACKAGE CHARACTERISTICS INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD (PCB) LAYOUT VI+ and VI− Operation PROPAGATION DELAY-RELATED PARAMETERS UNDERVOLTAGE LOCKOUT (UVLO) OUTPUT LOAD CHARACTERISTICS Miller Clamp POWER DISSIPATION INSULATION LIFETIME TYPICAL APPLICATIONS OUTLINE DIMENSIONS ORDERING GUIDE