Datasheet ADuM4136 (Analog Devices)

Single-/Dual-Supply, High Voltage Isolated IGBT Gate Driver Data Sheet ADuM4136 FEATURES GENERAL DESCRIPTION 4 A peak drive output capability
The ADuM4136 is a single-channel gate driver specifically
Output power device resistance: <1 Ω
optimized for driving insulated gate bipolar transistors (IGBTs).
Desaturation protection
Analog Devices, Inc., iCoupler® technology provides isolation
Isolated fault output
between the input signal and the output gate drive.
Soft shutdown on fault
Operation with unipolar or bipolar secondary supplies is
Isolated fault and ready functions
possible, allowing negative gate drive if needed.
Low propagation delay: 55 ns typical Minimum pulse width: 50 ns
The Analog Devices chip scale transformers also provide isolated
Operating temperature range: −40°C to +125°C
communication of control information between the high voltage
Output voltage range to 35 V
and low voltage domains of the chip. Information on the status
Input voltage range from 2.5 V to 6 V
of the chip can be read back from dedicated outputs. Control of
Output and input undervoltage lockout (UVLO)
resetting the device after a fault on the secondary side is
Creepage distance: 7.8 mm minimum
performed on the primary side of the device.
100 kV/μs minimum common-mode transient immunity (CMTI)
Integrated onto the ADuM4136 is a desaturation detection
20-year lifetime for 600 V rms or 1092 V dc working voltage
circuit that provides protection against high voltage short-
Safety and regulatory approvals (pending)
circuit IGBT operation. The desaturation protection contains
5 kV ac for 1 minute per UL 1577
noise reducing features such as a 312 ns (typical) masking time
CSA Component Acceptance Notice 5A
after a switching event to mask voltage spikes due to initial
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
turn-on. An internal 537 μA (typical) current source allows low
VIORM = 849 V peak (basic)
device count, and the internal blanking switch allows the
APPLICATIONS
addition of an external current source if more noise immunity is needed.
MOSFET/IGBT gate drivers Photovoltaic (PV) inverters
The secondary UVLO is set to 12 V with common IGBT
Motor drives
threshold levels taken into consideration.
Power supplies FUNCTIONAL BLOCK DIAGRAM ADuM4136 16 GND 1 2 VI+ UVLO UVLO 9V 15 V V SS2 I– 2 2 2 VDD1 3 14 DESAT VSS1 4 13 VDD2 1 MASTER MASTER RESET 5 2 LOGIC ENCODE DECODE LOGIC 12 VDD2 PRIMARY SECONDARY 1 FAULT 6 DECODE ENCODE 11 VOUT 1 READY 7 10 VSS2 2 2 9 V V TSD SS2 SS1 8 1 1 2
1
NOTES
-00 5
1. GROUNDS ON PRIMARY AND SECONDARY SIDE ARE ISOLATED FROM EACH OTHER.
57 13 Figure 1.
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Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Electrical Characteristics Package Characteristics Regulatory Information Insulation and Safety Related Specifications DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performanace Characteristics Applications Information PCB Layout Propagation Delay Related Parameters Protection Features Fault Reporting Desaturation Detection Thermal Shutdown Undervoltage Lockout (UVLO) Faults READY Pin Pin Pin VI+ and VI− Operation Gate Resistance Selection Power Dissipation DC Correctness and Magnetic Field Immunity Insulation Lifetime Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example Typical Application Outline Dimensions Ordering Guide