Datasheet TB67H450FNG (Toshiba) - 7
| 制造商 | Toshiba |
| 描述 | Capable of constant current controlling (PWM) / CW/CCW/Short Brake/Stop modes / Standby function. Brush motor driver IC |
| 页数 / 页 | 20 / 7 — Constant current PWM blanking time. Blanking time between Input signal … |
| 文件格式/大小 | PDF / 505 Kb |
| 文件语言 | 英语 |
Constant current PWM blanking time. Blanking time between Input signal and tBLK. IN1. IN2. Iout
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TB67H450FNG
Constant current PWM blanking time
In TB67H450FNG, the following blanking time is set to prevent a spike current and external noise which are generated during driving a motor. (1) tBLK (2) NFth Charge Fast Slow The timing charts or constants may be omitted or simplified for explanatory. tBLK (For preventing incorrect detection of a spike current at changing from Decay to Charge): 3.6 μs (typ.): (1) The blanking time, 400 ns (typ.) is also set for preventing an incorrect detection around setting current value (NFth).: (2) * The time widths shown in the above figure are the design values, and the values are not guaranteed.
Blanking time between Input signal and tBLK
The tBLK is intended to avoid inrush current detection. The TB67H450FNG not only can be controlled by constant current PWM, but also by direct PWM; with IN control signals. Therefore the tBLK is set at each IN switch timing; shown with gray in the timing chart below.
IN1 IN2 Iout
Timing charts may be simplified for explanatory purposes. 7 2019-04-01
Constant current PWM blanking time
In TB67H450FNG, the following blanking time is set to prevent a spike current and external noise which are generated during driving a motor. (1) tBLK (2) NFth Charge Fast Slow The timing charts or constants may be omitted or simplified for explanatory. tBLK (For preventing incorrect detection of a spike current at changing from Decay to Charge): 3.6 μs (typ.): (1) The blanking time, 400 ns (typ.) is also set for preventing an incorrect detection around setting current value (NFth).: (2) * The time widths shown in the above figure are the design values, and the values are not guaranteed.
Blanking time between Input signal and tBLK
The tBLK is intended to avoid inrush current detection. The TB67H450FNG not only can be controlled by constant current PWM, but also by direct PWM; with IN control signals. Therefore the tBLK is set at each IN switch timing; shown with gray in the timing chart below.
IN1 IN2 Iout
Timing charts may be simplified for explanatory purposes. 7 2019-04-01